Design and Implementation of a Control IC forInterleaved BCM Boost PFCs

碩士 === 國立成功大學 === 電機工程學系碩博士班 === 100 === In this thesis, a novel interleaved BCM boost PFC control IC is designed and implemented. This contoller not only retains the advantage of low swtiching loss of BCM control but also increases the power rating of converter. The voltage mode master-slave interl...

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Bibliographic Details
Main Authors: Kuan-HsienChou, 周冠賢
Other Authors: Tsorng-Juu Liang
Format: Others
Language:en_US
Published: 2012
Online Access:http://ndltd.ncl.edu.tw/handle/73170789178915553193
Description
Summary:碩士 === 國立成功大學 === 電機工程學系碩博士班 === 100 === In this thesis, a novel interleaved BCM boost PFC control IC is designed and implemented. This contoller not only retains the advantage of low swtiching loss of BCM control but also increases the power rating of converter. The voltage mode master-slave interleaved control with turn-on instant phase-shift is adopted in the proposed controller. Conventionally, the interleaved BCM control scheme may occasionally operate in CCM due to pertubations. To solve this problem, the thesis proposes a novel phase-shifter to generate phase-shift signal. And the second zero current detector cooperated with the phase-shift signal is utilized to make the slave converter operate under BCM. In addition, this controller can always operate in normal condition even under the mismatch of two boost inductors. Finally, this chip is fabricated with TSMC 0.25 UM CMOS HIGH VOLTAGE MIXED SIGNAL BASED BCD 1P5M SALICIDE 2.5/5/60 V process.