Hardware-Efficient and Coefficient Memory-Free Design with the Common Architecture Implementation of the Recursive MDCT, MDST, IMDCT, IMDST and DFT Algorithms
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 100 === Digital audio coding has become more and more popular and indispensable feature of consumer electronics in recent years. For the portable devices and consumer interest, a multi-standard design on a single device has found widespread use in popular audio appli...
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ndltd-TW-100NCKU54421922015-10-13T21:38:03Z http://ndltd.ncl.edu.tw/handle/55170995965021468928 Hardware-Efficient and Coefficient Memory-Free Design with the Common Architecture Implementation of the Recursive MDCT, MDST, IMDCT, IMDST and DFT Algorithms 適用於遞迴式修正型離散正餘弦與傅立葉轉換之免係數記憶體-共架構設計 Yi-PingYeh 葉翼萍 碩士 國立成功大學 電機工程學系碩博士班 100 Digital audio coding has become more and more popular and indispensable feature of consumer electronics in recent years. For the portable devices and consumer interest, a multi-standard design on a single device has found widespread use in popular audio applications. In this thesis, we propose a compact common-architecture design for computing the modified discrete cosine transform (MDCT), modified discrete sine transform (MDST), inverse modified discrete cosine transform (IMDCT), inverse modified discrete sine transform (IMDST) and discrete fourier transform (DFT). With a simple preprocessor, the proposed algorithm, which can be derived into a common computation, requires low computational complexity and is applied on MPEG-1 Layer I to III ( 12 / 36 – MDCT / MDST / IMDCT / IMDST, 512 / 1024 – DFT ), AAC ( 256 / 2048 – MDCT / MDST / IMDCT / IMDST, 256 / 2048 - DFT) and E-AC-3 ( 256 / 512 – MDCT / MDST / IMDCT / IMDST ). In the architecture, a high-throughput, coefficient memory-free and hardware-sharing architecture is developed include which can be configured for different transforms. Furthermore, this design is synthesized using TSMC 0.18μm 1P6M CMOS technology and takes about 30.3K gates while the max clock rate is 52.63MHz. Sheau-Fang Lei 雷曉方 2012 學位論文 ; thesis 131 zh-TW |
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碩士 === 國立成功大學 === 電機工程學系碩博士班 === 100 === Digital audio coding has become more and more popular and indispensable feature of consumer electronics in recent years. For the portable devices and consumer interest, a multi-standard design on a single device has found widespread use in popular audio applications. In this thesis, we propose a compact common-architecture design for computing the modified discrete cosine transform (MDCT), modified discrete sine transform (MDST), inverse modified discrete cosine transform (IMDCT), inverse modified discrete sine transform (IMDST) and discrete fourier transform (DFT). With a simple preprocessor, the proposed algorithm, which can be derived into a common computation, requires low computational complexity and is applied on MPEG-1 Layer I to III ( 12 / 36 – MDCT / MDST / IMDCT / IMDST, 512 / 1024 – DFT ), AAC ( 256 / 2048 – MDCT / MDST / IMDCT / IMDST, 256 / 2048 - DFT) and E-AC-3 ( 256 / 512 – MDCT / MDST / IMDCT / IMDST ). In the architecture, a high-throughput, coefficient memory-free and hardware-sharing architecture is developed include which can be configured for different transforms. Furthermore, this design is synthesized using TSMC 0.18μm 1P6M CMOS technology and takes about 30.3K gates while the max clock rate is 52.63MHz.
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Sheau-Fang Lei |
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Sheau-Fang Lei Yi-PingYeh 葉翼萍 |
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Yi-PingYeh 葉翼萍 |
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Yi-PingYeh 葉翼萍 Hardware-Efficient and Coefficient Memory-Free Design with the Common Architecture Implementation of the Recursive MDCT, MDST, IMDCT, IMDST and DFT Algorithms |
author_sort |
Yi-PingYeh |
title |
Hardware-Efficient and Coefficient Memory-Free Design with the Common Architecture Implementation of the Recursive MDCT, MDST, IMDCT, IMDST and DFT Algorithms |
title_short |
Hardware-Efficient and Coefficient Memory-Free Design with the Common Architecture Implementation of the Recursive MDCT, MDST, IMDCT, IMDST and DFT Algorithms |
title_full |
Hardware-Efficient and Coefficient Memory-Free Design with the Common Architecture Implementation of the Recursive MDCT, MDST, IMDCT, IMDST and DFT Algorithms |
title_fullStr |
Hardware-Efficient and Coefficient Memory-Free Design with the Common Architecture Implementation of the Recursive MDCT, MDST, IMDCT, IMDST and DFT Algorithms |
title_full_unstemmed |
Hardware-Efficient and Coefficient Memory-Free Design with the Common Architecture Implementation of the Recursive MDCT, MDST, IMDCT, IMDST and DFT Algorithms |
title_sort |
hardware-efficient and coefficient memory-free design with the common architecture implementation of the recursive mdct, mdst, imdct, imdst and dft algorithms |
publishDate |
2012 |
url |
http://ndltd.ncl.edu.tw/handle/55170995965021468928 |
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