Hardware-Efficient and Coefficient Memory-Free Design with the Common Architecture Implementation of the Recursive MDCT, MDST, IMDCT, IMDST and DFT Algorithms

碩士 === 國立成功大學 === 電機工程學系碩博士班 === 100 === Digital audio coding has become more and more popular and indispensable feature of consumer electronics in recent years. For the portable devices and consumer interest, a multi-standard design on a single device has found widespread use in popular audio appli...

Full description

Bibliographic Details
Main Authors: Yi-PingYeh, 葉翼萍
Other Authors: Sheau-Fang Lei
Format: Others
Language:zh-TW
Published: 2012
Online Access:http://ndltd.ncl.edu.tw/handle/55170995965021468928
id ndltd-TW-100NCKU5442192
record_format oai_dc
spelling ndltd-TW-100NCKU54421922015-10-13T21:38:03Z http://ndltd.ncl.edu.tw/handle/55170995965021468928 Hardware-Efficient and Coefficient Memory-Free Design with the Common Architecture Implementation of the Recursive MDCT, MDST, IMDCT, IMDST and DFT Algorithms 適用於遞迴式修正型離散正餘弦與傅立葉轉換之免係數記憶體-共架構設計 Yi-PingYeh 葉翼萍 碩士 國立成功大學 電機工程學系碩博士班 100 Digital audio coding has become more and more popular and indispensable feature of consumer electronics in recent years. For the portable devices and consumer interest, a multi-standard design on a single device has found widespread use in popular audio applications. In this thesis, we propose a compact common-architecture design for computing the modified discrete cosine transform (MDCT), modified discrete sine transform (MDST), inverse modified discrete cosine transform (IMDCT), inverse modified discrete sine transform (IMDST) and discrete fourier transform (DFT). With a simple preprocessor, the proposed algorithm, which can be derived into a common computation, requires low computational complexity and is applied on MPEG-1 Layer I to III ( 12 / 36 – MDCT / MDST / IMDCT / IMDST, 512 / 1024 – DFT ), AAC ( 256 / 2048 – MDCT / MDST / IMDCT / IMDST, 256 / 2048 - DFT) and E-AC-3 ( 256 / 512 – MDCT / MDST / IMDCT / IMDST ). In the architecture, a high-throughput, coefficient memory-free and hardware-sharing architecture is developed include which can be configured for different transforms. Furthermore, this design is synthesized using TSMC 0.18μm 1P6M CMOS technology and takes about 30.3K gates while the max clock rate is 52.63MHz. Sheau-Fang Lei 雷曉方 2012 學位論文 ; thesis 131 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 國立成功大學 === 電機工程學系碩博士班 === 100 === Digital audio coding has become more and more popular and indispensable feature of consumer electronics in recent years. For the portable devices and consumer interest, a multi-standard design on a single device has found widespread use in popular audio applications. In this thesis, we propose a compact common-architecture design for computing the modified discrete cosine transform (MDCT), modified discrete sine transform (MDST), inverse modified discrete cosine transform (IMDCT), inverse modified discrete sine transform (IMDST) and discrete fourier transform (DFT). With a simple preprocessor, the proposed algorithm, which can be derived into a common computation, requires low computational complexity and is applied on MPEG-1 Layer I to III ( 12 / 36 – MDCT / MDST / IMDCT / IMDST, 512 / 1024 – DFT ), AAC ( 256 / 2048 – MDCT / MDST / IMDCT / IMDST, 256 / 2048 - DFT) and E-AC-3 ( 256 / 512 – MDCT / MDST / IMDCT / IMDST ). In the architecture, a high-throughput, coefficient memory-free and hardware-sharing architecture is developed include which can be configured for different transforms. Furthermore, this design is synthesized using TSMC 0.18μm 1P6M CMOS technology and takes about 30.3K gates while the max clock rate is 52.63MHz.
author2 Sheau-Fang Lei
author_facet Sheau-Fang Lei
Yi-PingYeh
葉翼萍
author Yi-PingYeh
葉翼萍
spellingShingle Yi-PingYeh
葉翼萍
Hardware-Efficient and Coefficient Memory-Free Design with the Common Architecture Implementation of the Recursive MDCT, MDST, IMDCT, IMDST and DFT Algorithms
author_sort Yi-PingYeh
title Hardware-Efficient and Coefficient Memory-Free Design with the Common Architecture Implementation of the Recursive MDCT, MDST, IMDCT, IMDST and DFT Algorithms
title_short Hardware-Efficient and Coefficient Memory-Free Design with the Common Architecture Implementation of the Recursive MDCT, MDST, IMDCT, IMDST and DFT Algorithms
title_full Hardware-Efficient and Coefficient Memory-Free Design with the Common Architecture Implementation of the Recursive MDCT, MDST, IMDCT, IMDST and DFT Algorithms
title_fullStr Hardware-Efficient and Coefficient Memory-Free Design with the Common Architecture Implementation of the Recursive MDCT, MDST, IMDCT, IMDST and DFT Algorithms
title_full_unstemmed Hardware-Efficient and Coefficient Memory-Free Design with the Common Architecture Implementation of the Recursive MDCT, MDST, IMDCT, IMDST and DFT Algorithms
title_sort hardware-efficient and coefficient memory-free design with the common architecture implementation of the recursive mdct, mdst, imdct, imdst and dft algorithms
publishDate 2012
url http://ndltd.ncl.edu.tw/handle/55170995965021468928
work_keys_str_mv AT yipingyeh hardwareefficientandcoefficientmemoryfreedesignwiththecommonarchitectureimplementationoftherecursivemdctmdstimdctimdstanddftalgorithms
AT yèyìpíng hardwareefficientandcoefficientmemoryfreedesignwiththecommonarchitectureimplementationoftherecursivemdctmdstimdctimdstanddftalgorithms
AT yipingyeh shìyòngyúdìhuíshìxiūzhèngxínglísànzhèngyúxiányǔfùlìyèzhuǎnhuànzhīmiǎnxìshùjìyìtǐgòngjiàgòushèjì
AT yèyìpíng shìyòngyúdìhuíshìxiūzhèngxínglísànzhèngyúxiányǔfùlìyèzhuǎnhuànzhīmiǎnxìshùjìyìtǐgòngjiàgòushèjì
_version_ 1718067681102397440