All Digital Programmable Spread Spectrum Clock Generator

碩士 === 國立暨南國際大學 === 電機工程學系 === 100 === Continuing advance of the semiconductor process technology enable the successful realization of the System-on-a-Chip (SoC). The performance and the complexity of SOCs keep grow steadily. However, the signal routing complexity inside the chip itself as well as t...

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Main Authors: Chang, Yijung, 張益榮
Other Authors: Wang,Yiming
Format: Others
Language:zh-TW
Published: 2012
Online Access:http://ndltd.ncl.edu.tw/handle/97107829115547828841
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spelling ndltd-TW-100NCNU04420022015-10-13T20:51:34Z http://ndltd.ncl.edu.tw/handle/97107829115547828841 All Digital Programmable Spread Spectrum Clock Generator 全數位可程式化展頻時脈產生器 Chang, Yijung 張益榮 碩士 國立暨南國際大學 電機工程學系 100 Continuing advance of the semiconductor process technology enable the successful realization of the System-on-a-Chip (SoC). The performance and the complexity of SOCs keep grow steadily. However, the signal routing complexity inside the chip itself as well as the level of electronic noise will also increase. To the best of our knowledge, the Electro Magnetic Interference (EMI) will gradually become an issue, since it will decrease the stability and reliability of a system. In order to alleviate this problem, shielding method has been adopted, but it has much higher cost compared to the spread spectrum clock circuit. Thus, the spread spectrum clock circuit has become more popular object of research than shielding method. This paper presents an all-digital programmable spread spectrum clock generator (SSCG) that allows user to program the operation mode as well as the spread ratio. In the design of proposed SSCG, an improved successive approximation register based controller is adopted to accelerate the locking time of center frequency of SSCG. Furthermore, a digital-to-time converter based frequency synthesizer is also applied to extend the operating frequency range of SSCG. The proposed SSCG has been designed based on 0.18-μm 1P6M CMOS technology with a 1.8V power supply voltage. The HSPICE simulation results show that the acceptable frequency of input clock ranges from 70MHz to 150MHz, and the frequency of output clock ranges from 35MHz to 600MHz. When the SSCG operated at 600MHz, the overall power consumption is about 2.42mW and it achieves a 20.3dB EMI reductions with 10% spreading ratio Wang,Yiming 王義明 2012 學位論文 ; thesis 84 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 國立暨南國際大學 === 電機工程學系 === 100 === Continuing advance of the semiconductor process technology enable the successful realization of the System-on-a-Chip (SoC). The performance and the complexity of SOCs keep grow steadily. However, the signal routing complexity inside the chip itself as well as the level of electronic noise will also increase. To the best of our knowledge, the Electro Magnetic Interference (EMI) will gradually become an issue, since it will decrease the stability and reliability of a system. In order to alleviate this problem, shielding method has been adopted, but it has much higher cost compared to the spread spectrum clock circuit. Thus, the spread spectrum clock circuit has become more popular object of research than shielding method. This paper presents an all-digital programmable spread spectrum clock generator (SSCG) that allows user to program the operation mode as well as the spread ratio. In the design of proposed SSCG, an improved successive approximation register based controller is adopted to accelerate the locking time of center frequency of SSCG. Furthermore, a digital-to-time converter based frequency synthesizer is also applied to extend the operating frequency range of SSCG. The proposed SSCG has been designed based on 0.18-μm 1P6M CMOS technology with a 1.8V power supply voltage. The HSPICE simulation results show that the acceptable frequency of input clock ranges from 70MHz to 150MHz, and the frequency of output clock ranges from 35MHz to 600MHz. When the SSCG operated at 600MHz, the overall power consumption is about 2.42mW and it achieves a 20.3dB EMI reductions with 10% spreading ratio
author2 Wang,Yiming
author_facet Wang,Yiming
Chang, Yijung
張益榮
author Chang, Yijung
張益榮
spellingShingle Chang, Yijung
張益榮
All Digital Programmable Spread Spectrum Clock Generator
author_sort Chang, Yijung
title All Digital Programmable Spread Spectrum Clock Generator
title_short All Digital Programmable Spread Spectrum Clock Generator
title_full All Digital Programmable Spread Spectrum Clock Generator
title_fullStr All Digital Programmable Spread Spectrum Clock Generator
title_full_unstemmed All Digital Programmable Spread Spectrum Clock Generator
title_sort all digital programmable spread spectrum clock generator
publishDate 2012
url http://ndltd.ncl.edu.tw/handle/97107829115547828841
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