Improvement of 4H-SiC MIS Capacitor Interface State Density by Low Thermal Budget Processes

碩士 === 國立交通大學 === 電子研究所 === 100 === Silicon carbide (SiC) is suitable for fabricating high power semiconductor devices because of its wide band-gap and high thermal conductivity. Unfortunately, low channel mobility occurs on the 4H-SiC MOSFETs due to the high SiO2/SiC interface state density. How to...

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Main Authors: Marvin-Ueng, 翁茂元
Other Authors: Tsui, Bing-Yue
Format: Others
Language:en_US
Published: 2012
Online Access:http://ndltd.ncl.edu.tw/handle/96212313344306166188
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description 碩士 === 國立交通大學 === 電子研究所 === 100 === Silicon carbide (SiC) is suitable for fabricating high power semiconductor devices because of its wide band-gap and high thermal conductivity. Unfortunately, low channel mobility occurs on the 4H-SiC MOSFETs due to the high SiO2/SiC interface state density. How to reduce interface state density is an important issue. In this thesis, several low thermal budget processes to reduce interface state density are evaluated. Electrical parameters including interface state density and breakdown field distribution are analyzed. The effect of process conditions on interface state density is also discussed. The low temperature (1050 ℃) wet oxidation sample set provides the higher bound reference of the interface state density (Dit) in this thesis. It is expected that the shorter oxidation time would result in lower interface state density. However, it is observed that lots of carbon clusters saturate on the 0.5 hr wet oxidation sample. It is suspected that the oxidation temperature is not high enough for the diffusion of CO. The interface state density of the wet oxidation sample set is around 5x1011 cm-2eV-1 at Ec-E = 0.4 eV. High temperature (1300 ℃) N2O oxidation sample sets the lower bound reference of Dit. The Dit value of this sample is 4.67x1010 cm-2eV-1 and is 10 times lower than that of the wet oxidation samples. Low temperature (1100 ℃) post-oxidation annealing, with the N2O annealing or NH3 annealing, can improve the interface quality separately. The N2O annealing and NH3 annealing have superimposed effect the Dit can be improved to 2.92 x1011 cm-2eV-1 at Ec-E = 0.4 eV. N2O annealing can improve breakdown field but the breakdown field variation is still large. These results indicate that N2O annealing can improved oxide quality but the early breakdown due to the rough SiC surface cannot be changed. Samples with Si3N4 capping have tight breakdown field distribution because weak spots in the wet oxide do not coincide with the weak spot in the nitride layer so that early breakdown could be suppressed because current path is hard to form. NH3 plasma treatment can improve Dit effectively but a 0.5~1 V positive shift of flat-band voltage compared to wet oxidation sample is observed on all of the plasma treated samples. The trends of interface improvement by plasma treatment at 150 W and 200 W are similar. The interface state density decreases as the plasma treatment time increases from 2 minutes to 5 minutes and gradually saturates as the plasma treatment time increases to 10 minutes. At the same plasma treatment time, 200 W results in slightly higher interface state density than 150 W. It is suspected that higher plasma energy produces additional interface defects due to the stronger radiation. The 100 W 15 min sample has higher Dit than 150 W 10 min. It is thus concluded that 150 W 10 minutes is the optimized condition. Lower energy cannot passivate interface states effectively even if 15 min treatment. Dielectric stacks sample has the lowest thermal budget. However, it has the highest interface state density among all samples. Post-deposition annealing is required. Dielectric stacks sample exhibits wide breakdown field variation. It is suspected that the quality of the bottom PECVD oxide is too poor. Finally, to extract deep level interface states, high temperature measurement would be required. It is observed that the Dit improvement occurs only in the range of Ec-E = 0.2-0.8 eV. As Ec-E > 1 eV, there is no Dit improvement on all the samples. Secondary ion mass spectroscopic analysis shows nitrogen pile-up at the SiO2/SiC interface on the sample HT. This phenomenon is not observed on the other samples. It is suspected that the diffusion of nitrogen radicals in SiO2 is slow. If nitrogen incorporation is processed after SiO2 growth, there are not sufficient nitrogen radicals can reach the interface at low thermal budget processes. Although suitable NH3 plasma treatment achieves the lowest interface state density among these low thermal budget samples, Dit = 1.37x1011 cm-2eV-1, this value is still 3 times higher than the lowest bound reference. Furthermore, the thermal budget of the plasma treatment is too low. Only hydrogen can passivate the interface states. It is suspected that hydrogen can only passivate shallow level interface states and does not affect the interface states deeper than 0.5 eV. To achieve very low interface state density, novel low thermal budget processes must be developed. Otherwise high thermal budget process is still unavoidable.
author2 Tsui, Bing-Yue
author_facet Tsui, Bing-Yue
Marvin-Ueng
翁茂元
author Marvin-Ueng
翁茂元
spellingShingle Marvin-Ueng
翁茂元
Improvement of 4H-SiC MIS Capacitor Interface State Density by Low Thermal Budget Processes
author_sort Marvin-Ueng
title Improvement of 4H-SiC MIS Capacitor Interface State Density by Low Thermal Budget Processes
title_short Improvement of 4H-SiC MIS Capacitor Interface State Density by Low Thermal Budget Processes
title_full Improvement of 4H-SiC MIS Capacitor Interface State Density by Low Thermal Budget Processes
title_fullStr Improvement of 4H-SiC MIS Capacitor Interface State Density by Low Thermal Budget Processes
title_full_unstemmed Improvement of 4H-SiC MIS Capacitor Interface State Density by Low Thermal Budget Processes
title_sort improvement of 4h-sic mis capacitor interface state density by low thermal budget processes
publishDate 2012
url http://ndltd.ncl.edu.tw/handle/96212313344306166188
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spelling ndltd-TW-100NCTU54281872015-10-13T21:45:18Z http://ndltd.ncl.edu.tw/handle/96212313344306166188 Improvement of 4H-SiC MIS Capacitor Interface State Density by Low Thermal Budget Processes 利用低熱預算製程改善碳化矽電容介面能態密度 Marvin-Ueng 翁茂元 碩士 國立交通大學 電子研究所 100 Silicon carbide (SiC) is suitable for fabricating high power semiconductor devices because of its wide band-gap and high thermal conductivity. Unfortunately, low channel mobility occurs on the 4H-SiC MOSFETs due to the high SiO2/SiC interface state density. How to reduce interface state density is an important issue. In this thesis, several low thermal budget processes to reduce interface state density are evaluated. Electrical parameters including interface state density and breakdown field distribution are analyzed. The effect of process conditions on interface state density is also discussed. The low temperature (1050 ℃) wet oxidation sample set provides the higher bound reference of the interface state density (Dit) in this thesis. It is expected that the shorter oxidation time would result in lower interface state density. However, it is observed that lots of carbon clusters saturate on the 0.5 hr wet oxidation sample. It is suspected that the oxidation temperature is not high enough for the diffusion of CO. The interface state density of the wet oxidation sample set is around 5x1011 cm-2eV-1 at Ec-E = 0.4 eV. High temperature (1300 ℃) N2O oxidation sample sets the lower bound reference of Dit. The Dit value of this sample is 4.67x1010 cm-2eV-1 and is 10 times lower than that of the wet oxidation samples. Low temperature (1100 ℃) post-oxidation annealing, with the N2O annealing or NH3 annealing, can improve the interface quality separately. The N2O annealing and NH3 annealing have superimposed effect the Dit can be improved to 2.92 x1011 cm-2eV-1 at Ec-E = 0.4 eV. N2O annealing can improve breakdown field but the breakdown field variation is still large. These results indicate that N2O annealing can improved oxide quality but the early breakdown due to the rough SiC surface cannot be changed. Samples with Si3N4 capping have tight breakdown field distribution because weak spots in the wet oxide do not coincide with the weak spot in the nitride layer so that early breakdown could be suppressed because current path is hard to form. NH3 plasma treatment can improve Dit effectively but a 0.5~1 V positive shift of flat-band voltage compared to wet oxidation sample is observed on all of the plasma treated samples. The trends of interface improvement by plasma treatment at 150 W and 200 W are similar. The interface state density decreases as the plasma treatment time increases from 2 minutes to 5 minutes and gradually saturates as the plasma treatment time increases to 10 minutes. At the same plasma treatment time, 200 W results in slightly higher interface state density than 150 W. It is suspected that higher plasma energy produces additional interface defects due to the stronger radiation. The 100 W 15 min sample has higher Dit than 150 W 10 min. It is thus concluded that 150 W 10 minutes is the optimized condition. Lower energy cannot passivate interface states effectively even if 15 min treatment. Dielectric stacks sample has the lowest thermal budget. However, it has the highest interface state density among all samples. Post-deposition annealing is required. Dielectric stacks sample exhibits wide breakdown field variation. It is suspected that the quality of the bottom PECVD oxide is too poor. Finally, to extract deep level interface states, high temperature measurement would be required. It is observed that the Dit improvement occurs only in the range of Ec-E = 0.2-0.8 eV. As Ec-E > 1 eV, there is no Dit improvement on all the samples. Secondary ion mass spectroscopic analysis shows nitrogen pile-up at the SiO2/SiC interface on the sample HT. This phenomenon is not observed on the other samples. It is suspected that the diffusion of nitrogen radicals in SiO2 is slow. If nitrogen incorporation is processed after SiO2 growth, there are not sufficient nitrogen radicals can reach the interface at low thermal budget processes. Although suitable NH3 plasma treatment achieves the lowest interface state density among these low thermal budget samples, Dit = 1.37x1011 cm-2eV-1, this value is still 3 times higher than the lowest bound reference. Furthermore, the thermal budget of the plasma treatment is too low. Only hydrogen can passivate the interface states. It is suspected that hydrogen can only passivate shallow level interface states and does not affect the interface states deeper than 0.5 eV. To achieve very low interface state density, novel low thermal budget processes must be developed. Otherwise high thermal budget process is still unavoidable. Tsui, Bing-Yue 崔秉鉞 2012 學位論文 ; thesis 76 en_US