Low-Power Continuous-Time Sigma-Delta Modulator for GSM
碩士 === 國立中山大學 === 電機工程學系研究所 === 100 === Continuous-time sigma-delta modulator can be applied to wireless communications, photography and MP3 player. Portable electronics products became mainstream the design of a low power consumption analog circuit become important. Therefore, this paper presents a...
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ndltd-TW-100NSYS54420622015-10-13T21:22:18Z http://ndltd.ncl.edu.tw/handle/34006394311059440138 Low-Power Continuous-Time Sigma-Delta Modulator for GSM 應用於GSM的低功率連續時間三角積分調變器 Jun-hong Liu 劉俊宏 碩士 國立中山大學 電機工程學系研究所 100 Continuous-time sigma-delta modulator can be applied to wireless communications, photography and MP3 player. Portable electronics products became mainstream the design of a low power consumption analog circuit become important. Therefore, this paper presents a low power consumption continuous-time sigma-delta modulator. The low-power continuous-time sigma-delta modulator includes one-bit quantizer and a third-order loop filter consisting of resistor-capacitor integrators. Through the modified Z-transform, the discrete time loop filter design is transformed to the continuous time loop filter design. The proposed sigma-delta modulator used TSMC 0.18μm CMOS 1P6M standard process, and its supply voltage is 1V, oversampling ratio is 32, bandwidth is 200 KHz, effective number is 13bit, power consumption is 1.5mW. Keywords: GSM, low power consumption, low power supply, continuous-time, sigma-delta modulator. Jyi-Tsong Lin Chia-Hsiung Kao 林吉聰 高家雄 2012 學位論文 ; thesis 103 en_US |
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碩士 === 國立中山大學 === 電機工程學系研究所 === 100 === Continuous-time sigma-delta modulator can be applied to wireless communications, photography and MP3 player. Portable electronics products became mainstream the design of a low power consumption analog circuit become important. Therefore, this paper presents a low power consumption continuous-time sigma-delta modulator.
The low-power continuous-time sigma-delta modulator includes one-bit quantizer and a third-order loop filter consisting of resistor-capacitor integrators. Through the modified Z-transform, the discrete time loop filter design is transformed to the continuous time loop filter design.
The proposed sigma-delta modulator used TSMC 0.18μm CMOS 1P6M standard process, and its supply voltage is 1V, oversampling ratio is 32, bandwidth is 200 KHz, effective number is 13bit, power consumption is 1.5mW.
Keywords: GSM, low power consumption, low power supply, continuous-time, sigma-delta modulator.
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Jyi-Tsong Lin |
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Jyi-Tsong Lin Jun-hong Liu 劉俊宏 |
author |
Jun-hong Liu 劉俊宏 |
spellingShingle |
Jun-hong Liu 劉俊宏 Low-Power Continuous-Time Sigma-Delta Modulator for GSM |
author_sort |
Jun-hong Liu |
title |
Low-Power Continuous-Time Sigma-Delta Modulator for GSM |
title_short |
Low-Power Continuous-Time Sigma-Delta Modulator for GSM |
title_full |
Low-Power Continuous-Time Sigma-Delta Modulator for GSM |
title_fullStr |
Low-Power Continuous-Time Sigma-Delta Modulator for GSM |
title_full_unstemmed |
Low-Power Continuous-Time Sigma-Delta Modulator for GSM |
title_sort |
low-power continuous-time sigma-delta modulator for gsm |
publishDate |
2012 |
url |
http://ndltd.ncl.edu.tw/handle/34006394311059440138 |
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