An Integrated and Improved Dispatching Approach to Reduce Cycle Time of Wet Etch and Furnace Area in Semiconductor Fabrication

An Integrated and Improved Dispatching Approach to Reduce Cycle Time of Wet Etch and Furnace Area in Semiconductor Fabrication

碩士 === 國立清華大學 === 工業工程與工程管理學系 === 100

Bibliographic Details
Main Author: 張嘉祐
Other Authors: 張國浩
Format: Others
Language:en_US
Published: 2012
Online Access:http://ndltd.ncl.edu.tw/handle/46425907366885108393
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spelling ndltd-TW-100NTHU50310942015-10-13T21:22:41Z http://ndltd.ncl.edu.tw/handle/46425907366885108393 An Integrated and Improved Dispatching Approach to Reduce Cycle Time of Wet Etch and Furnace Area in Semiconductor Fabrication 針對半導體廠之酸槽爐管製程發展整合性派工法則以期望降低產品週期時間 張嘉祐 碩士 國立清華大學 工業工程與工程管理學系 100 張國浩 2012 學位論文 ; thesis 30 en_US
collection NDLTD
language en_US
format Others
sources NDLTD
description 碩士 === 國立清華大學 === 工業工程與工程管理學系 === 100
author2 張國浩
author_facet 張國浩
張嘉祐
author 張嘉祐
spellingShingle 張嘉祐
An Integrated and Improved Dispatching Approach to Reduce Cycle Time of Wet Etch and Furnace Area in Semiconductor Fabrication
author_sort 張嘉祐
title An Integrated and Improved Dispatching Approach to Reduce Cycle Time of Wet Etch and Furnace Area in Semiconductor Fabrication
title_short An Integrated and Improved Dispatching Approach to Reduce Cycle Time of Wet Etch and Furnace Area in Semiconductor Fabrication
title_full An Integrated and Improved Dispatching Approach to Reduce Cycle Time of Wet Etch and Furnace Area in Semiconductor Fabrication
title_fullStr An Integrated and Improved Dispatching Approach to Reduce Cycle Time of Wet Etch and Furnace Area in Semiconductor Fabrication
title_full_unstemmed An Integrated and Improved Dispatching Approach to Reduce Cycle Time of Wet Etch and Furnace Area in Semiconductor Fabrication
title_sort integrated and improved dispatching approach to reduce cycle time of wet etch and furnace area in semiconductor fabrication
publishDate 2012
url http://ndltd.ncl.edu.tw/handle/46425907366885108393
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