Investigation of Embedded Low-Temperature Polysilicon Non-Volatile Memory

博士 === 國立清華大學 === 電子工程研究所 === 100 === To meet the requirements of active matrix liquid crystal display (AMLCD) with a compact, highly reliable, and high resolution, low-temperature polycrystalline silicon (LTPS) thin film transistors (TFTs) using sequential lateral solidify (SLS) crystallization tec...

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Bibliographic Details
Main Authors: Hsieh, Szu-I, 謝思義
Other Authors: King, Ya-Chin
Format: Others
Language:en_US
Published: 2012
Online Access:http://ndltd.ncl.edu.tw/handle/59012422093635142444
Description
Summary:博士 === 國立清華大學 === 電子工程研究所 === 100 === To meet the requirements of active matrix liquid crystal display (AMLCD) with a compact, highly reliable, and high resolution, low-temperature polycrystalline silicon (LTPS) thin film transistors (TFTs) using sequential lateral solidify (SLS) crystallization technology on a glass substrate are proposed and demonstrated. LTPS-TFTs with oxide–nitride–oxide (ONO) stacked gate structure revealed superior device performance and device reliability characteristics than conventional SiO2 TFTs. This multi stacked layer gate structure capable of sustaining high-voltage operations can greatly enhance the feasibility of implementing LTPS TFTs embedded peripheral in AMLCDs panels. An embedded MONOS-type memory device with a field-enhancing tip structure with 1-T per cell realized using SLS-LTPS technology is demonstrated for the first time. The memory device fabrication is fully compatible with conventional LTPS processing and the position of Si protrusions can be well-controlled by the SLS alignment technique. Without additional processing steps, this memory cell can be implemented simply by a typical LTPS technology. The embedded NVM can not only be integrated into each pixel to reduce the power consumption of LCD panels, but also act as programmable logic arrays to extend the functionality on portable electronic devices. Program and erase operations of these MONOS TFTs can be achieved by channel hot electron injection and band-to-band tunneling induced hot hole injection, respectively. These memory cells exhibit fairly good cycling endurance and data retention characteristics, as well as good immunity to program/read disturbance. The proposed poly-Si TFT MONOS nonvolatile memory could be arranged in a NOR-type array and/or NAND-type array to provide a highly feasible solution for embedded programmable logics arrays on panel systems. Experimental results reveal that these memory arrays can be operated under low-voltage with good reliability in cycling stability as well as data retention capability.