| Summary: | 博士 === 國立清華大學 === 電機工程學系 === 100 === This thesis investigates several RF front-end design techniques to maximize the power efficiency
for performance tradeoffs in wideband applications. There are two major aspects. One
is the design tradeoff between the power consumption and signal quality, especially on noise
performance in wideband low-noise amplifiers (LNA), since the challenge of limited battery
life-time in portable device makes the power-efficiency always a topic of interest. The other
is the harmonic mixing problem in frequency conversion of wideband systems. The problem
causes larger penalties of power and cost when it has to be concerned.
For the power-efficient LNA design, a series of passive techniques without power supplies
are introduced for some non-stringent wireless applications. The impedance transformation is
used to provide a voltage gain for reducing the power budget in an RF chain. Both narrowband
and wideband amplifiers are realized to demonstrate the passive performance. Moreover, a
voltage-mode passive mixer is introduced for a case study of fully passive RF front-end. A
straight-forward derivation of the conversion gain is introduced to describe the physical meaning
of the conversion.
For another case of inductor-less wideband LNAs, due to the lack of the finesse from the
matching network, the design tradeoffs are more rigid in many circuit topologies, especially
on trading for noise performance. In this thesis, a noise suppression feedback technique is
proposed to alleviate the power requirement on noise reduction. The technique has been successfully
applied to an RF LNA and a baseband variable-gain amplifier to demonstrate the feasibility
of the noise suppression. The results break the fundamental power overhead for noise
improvement. This technique is also integrated in a noise-suppressed, linearity-enhanced, and
bandwidth-extended LNA with high power efficiency.
The second part of the thesis is to resolve the harmonic mixing problem without heavy
power and cost penalties. In this thesis we develop a new mixer structure named class-B-like
linear conversion. The conversion exhibits noise performance near a switching-type one, while
its harmonic mixing rejection is comparable with the conventional rejection techniques. The
class-B-like mixer consumes 4.8 mW from a 1.8V supply voltage. The chip area is only 270m
x 190m. Measurement results indicate that the third- to ninth-order harmonic rejections are
more than 45 dB in average within 4-GHz frequency range.
To further extend the usage of the class-B-like operation, a digital TV RF front-end integrates
the technique associated with a conventional polyphase harmonic cancellation. This
prototype contains an LNA, a polyphase down-conversion with the class-B-like mixing, and a
square-to-triangle waveform generator for the compatibility to digital-output frequency synthesizers.
From measurement results, although the low frequency performance is limited by the
waveform generator, this idea can still be proven as a high power efficient solution for harmonic
mixing rejection in a wideband receiver design.
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