Circuit Implementation and Design Considerations of the Highly-Efficient DC-DC Step-Down Switching Converter ICs Over a Wide Workload Range

博士 === 國立清華大學 === 電機工程學系 === 100 === This dissertation presents two highly-efficient buck converter ICs for cellular phone applications. In cellular phones, the load current demanded by the on-board circuitry varies from below 10 mA up to a few hundred mA. Thus, a highly-efficient feature over a w...

Full description

Bibliographic Details
Main Authors: Lan, Po-Hsiang, 藍柏祥
Other Authors: Huang, Po-Chiun
Format: Others
Language:en_US
Published: 2012
Online Access:http://ndltd.ncl.edu.tw/handle/45614201981605859717
Description
Summary:博士 === 國立清華大學 === 電機工程學系 === 100 === This dissertation presents two highly-efficient buck converter ICs for cellular phone applications. In cellular phones, the load current demanded by the on-board circuitry varies from below 10 mA up to a few hundred mA. Thus, a highly-efficient feature over a wide load range is of high priority for power management units (PMUs), since the total energy is limited by the capacity of a single cell Li-ion battery. Additionally, a temperature-aware current-mode control multi-phase buck converter for 3-D IC applications is also presented. In 3-D stacking architecture, the overheating problem is not easy to overcome with the thermal grease. By distributing the power module units to avoid the hot spot, smart power management is important for the cooling mechanism besides exploring the new materials. The first work exhibits a digitally-controlled voltage-mode step-down converter with asynchronous power saving technique. To meet the growing demand over a wide load range of interest, pulse-width modulation (PWM) and pulse-frequency modulation (PFM) are two widespread control schemes in the switching converters. With the proposed asynchronous power saving technique, combined with the off-time modulation, a very high efficiency of at least 90% is achieved experimentally from 3 to 400 mA load conditions without embedded sensing circuitry. The digitally-controlled voltage mode step-down converter IC, fabricated in a 0.18-μm CMOS process, takes 1.8 mm2 total area and demonstrates equal or better performance compared to the state-of-the-art analog switchers. The converter IC is supplied with an input voltage from 2.7 to 3.6 V and the switching frequency is from 44 KHz to 1.65 MHz. The maximum output ripple is 40 mV with a 10-μF off-chip capacitor and a 2.2-μH off-chip inductor. The second work exhibits a current-mode control step-down converter with assisted frequency-locked loop. The current mode controller is widely used in the switching power supply designs because of its fast response and less stability concern. However its performance at light load condition is limited by the precision of current sensing. In the second work, instead of using high speed current sensor, a frequency-locked loop (FLL) is incorporated to extend the operation range with high power efficiency. The 1.8-V output DC-DC step-down converter IC, fabricated in a standard 0.35-μm CMOS process, is supplied from 2.7 to 4.3 V. Experimental results show that this switching converter operates from 100 to 600 kHz with the efficiency higher than 90% for the load current between 25 and 450 mA. The output voltage ripple is smaller than 30 mV with a 4.7-μH inductor and a 4.7-μF capacitor. The third work presents a temperature-aware current-mode control multi-phase buck converter IC with a wake-up and shut-down dual engine. The multi-phase characteristic is widely adopted in the distributed power system since many applications are required for more power with less size and cost. Based on the distributive concept, it offers another possible solution for 3-D IC applications to alleviate the difficulties of overheating. By making use of the paralleling configuration, the 1.8-V output DC-DC step-down converter IC, fabricated in a standard 0.35-μm CMOS process, is experimentally demonstrated with 2.5 mA/°C temperature-aware feature. The converter is supplied from 2.7 to 4.3 V and operates with 5 MHz in PWM. The minimum efficiency is 80% for the load demands from 20 to 400 mA with PWM-PFM dual-mode modulation. The output voltage ripple is smaller than 30 mV with a 1-μH inductor and a 2-μF capacitor.