Ring Switch Box for Three-Dimensional FPGA Design

碩士 === 國立臺灣海洋大學 === 資訊工程學系 === 100 === Three-dimensional (3-D) integrated circuit is the future development trend, and the latest 3D FPGA technology is developed to verify and realize 3D IC. Switch Box plays an important role in the routing capacity of the FPGA. Therefore, to use a larger routing ca...

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Main Authors: Hung-Ching Ho, 何泓璟
Other Authors: Mao-Hsu Yen
Format: Others
Language:zh-TW
Published: 2012
Online Access:http://ndltd.ncl.edu.tw/handle/46835474585471853710
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spelling ndltd-TW-100NTOU53940332015-10-13T22:51:54Z http://ndltd.ncl.edu.tw/handle/46835474585471853710 Ring Switch Box for Three-Dimensional FPGA Design 三維現場可程式邏輯陣列之環形交換盒設計 Hung-Ching Ho 何泓璟 碩士 國立臺灣海洋大學 資訊工程學系 100 Three-dimensional (3-D) integrated circuit is the future development trend, and the latest 3D FPGA technology is developed to verify and realize 3D IC. Switch Box plays an important role in the routing capacity of the FPGA. Therefore, to use a larger routing capacity switch box can reduce the tracks, and have better area performance in FPGA routing. 2D Hyper-Universal Ring Switch Box (HURSB) has better switch-efficiency than Fan’s switch block. Accroding to the spirit of HURSB, we proposed a 3D Ring Switch Box (3D-RSB). Furthermore we define Fso and Fsi to classify RSB(Fso, Fsi). First part we pick the best RSB(3, 2)_star by using the TPR software and the Microelectronics Center of North Carolina (MCNC) Benchmark. Second part we compare RSB (3, 2)_star with other switch box architecture. We find RSB(3, 2) for the use of the channel is better than other architectures. Experimental results show the use of the horizontal channel widths (HCW) reduced about 7.8% with Universal-Twist Switch box. Mao-Hsu Yen 嚴茂旭 2012 學位論文 ; thesis 63 zh-TW
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description 碩士 === 國立臺灣海洋大學 === 資訊工程學系 === 100 === Three-dimensional (3-D) integrated circuit is the future development trend, and the latest 3D FPGA technology is developed to verify and realize 3D IC. Switch Box plays an important role in the routing capacity of the FPGA. Therefore, to use a larger routing capacity switch box can reduce the tracks, and have better area performance in FPGA routing. 2D Hyper-Universal Ring Switch Box (HURSB) has better switch-efficiency than Fan’s switch block. Accroding to the spirit of HURSB, we proposed a 3D Ring Switch Box (3D-RSB). Furthermore we define Fso and Fsi to classify RSB(Fso, Fsi). First part we pick the best RSB(3, 2)_star by using the TPR software and the Microelectronics Center of North Carolina (MCNC) Benchmark. Second part we compare RSB (3, 2)_star with other switch box architecture. We find RSB(3, 2) for the use of the channel is better than other architectures. Experimental results show the use of the horizontal channel widths (HCW) reduced about 7.8% with Universal-Twist Switch box.
author2 Mao-Hsu Yen
author_facet Mao-Hsu Yen
Hung-Ching Ho
何泓璟
author Hung-Ching Ho
何泓璟
spellingShingle Hung-Ching Ho
何泓璟
Ring Switch Box for Three-Dimensional FPGA Design
author_sort Hung-Ching Ho
title Ring Switch Box for Three-Dimensional FPGA Design
title_short Ring Switch Box for Three-Dimensional FPGA Design
title_full Ring Switch Box for Three-Dimensional FPGA Design
title_fullStr Ring Switch Box for Three-Dimensional FPGA Design
title_full_unstemmed Ring Switch Box for Three-Dimensional FPGA Design
title_sort ring switch box for three-dimensional fpga design
publishDate 2012
url http://ndltd.ncl.edu.tw/handle/46835474585471853710
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