| Summary: | 碩士 === 國立臺灣大學 === 電子工程學研究所 === 100 === In wireless communication system low power and high efficiency are the major concern. This thesis proposes a modulation system which can achieve low power and high data rate requirement. For traditional mixer-based transmitter architecture, the DACs, filters, and mixers consume large power under high data rate and induce many non-idealities of analog circuits. The key component of the modulation system is phase selector, which replaces these circuits and achieve low-power performance. Besides, the direct-up conversion structure facilitates the high data rate operation. The supported modulation schemes are OQPSK and OQPSK with half-sine shaping. These modulation schemes are different from phase-continuity, which might influence the output spectrums. The experimental results shows that the phase-selector based transmitter system deliver a 22.5-Mb/s data rate for -8 dBm output power, and the EVM is lower than 8%. Fabricated in 0.18-um CMOS process, the total power consumption of the transmitter is 2.9 mW under 1-V supply.
The other work is a G/FSK baseband modulator for 60-GHz band application, which adopts analog topology since the transmission data rate is beyond operating speed of digital circuits. The measured data rate is up to 1 GHz under FSK mode. This chip is fabricated in 90-nm CMOS process and consumes 23 mW under 1.2-V supply.
The operating principle of both modulator systems is based on phase-switching technique, which adopts CML topology. Due to its simplicity and semi-digital characteristics, the design burdens are eliminated and achieve better performance.
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