Dual-Mode Low-Complexity Codebook Searching Algorithm and Architecture Design for LTE/LTE-Advanced Systems

• Main Authors: Yi-Hsuan Lin, 林怡萱
• Other Authors: 吳安宇
• Format: Others
• Language: en_US
• Published: 2012
• Online Access: http://ndltd.ncl.edu.tw/handle/58431626006206571087

碩士 === 國立臺灣大學 === 電子工程學研究所 === 100 === LTE (Long Term Evolution) and LTE-A (LTE-Advanced) systems are dominant standards in future mobile communication systems. LTE and LTE-A systems utilize multiple-input multiple-output orthogonal frequency division multiplexing (MIMO-OFDM) technique, which can resist multipath interference and improve the spectrum efficiency. The main concern is the interferences among all transmit and receive antennas. The closed-loop scheme, i.e. precoding, is proved to be about 4dB better performance [28] compared with the open-loop solution, which also reduces the overall power consumption. Codebook is a useful precoding technique for limited feedback systems because only few bits are required to feedback. Several codebook selection criteria for linear receivers have been proposed in [13][14][22]-[24]; nevertheless, these selection criteria are computationally intensive and most of them are not feasible for aperiodic feedback reporting in LTE and LTE-A systems. On account of the limited processing hardware and feedback delay constraints, low-complexity transceivers with efficient codebook selection scheme should be considered. In this thesis, the low-complexity codebook searching engine is proposed for LTE and LTE-A systems. The properties and mutual correlations of the LTE and LTE-A codebooks are analyzed and then a low-complexity grouping FFT-based codebook searching algorithm is proposed. Since the proposed algorithm is an algorithmic transformation, there is no performance loss. The proposed schemes have significant effect of reducing the number of multiplications by 56%, compared with the low-complexity cofactor scheme [26]. At last, a dual-mode low-complexity codebook searching engine with TSMC 90 nm is implemented. The IP size is 2.2 mm2 and the equivalent gate count is 547.6K. The operating frequency is 125MHz.