| Summary: | 碩士 === 國立臺灣大學 === 電子工程學研究所 === 100 === With the development and progress of CMOS process, the high-speed circuits should be realized by BJT in the past are gradually replaced by CMOS. It inspires many millimeter-wave applications; such as point to point communications, image sensing, automotive radar systems, radio astronomy. In above applications, the phase-locked loop (PLL) is an important component to sever as a local oscillator or channel selector.
To realize a very-high-speed PLL, the frequency divider following the voltage-controlled oscillator will be a crucial building block. It must have high operation frequency, wide locking range, and low power consumption. In millimeter wave circuits design, the parasitic capacitances of passive inductors, wire lines and transistors will decrease the operation frequency of circuits. Injection-locked frequency dividers (ILFDs) with LC tank based oscillators can be a good solution for high operation frequency, low power consumption and low phase noise. To achieve high speed, the distributed-LC technique is used and the circuit oscillates at its second pole. In addition, coupled inductors are added to the distributed-LC network to enhance the oscillation condition and increase the locking range. According to above design issues, the operation frequency and oscillation condition of the distributed-LC ILFDs will be analyzed at the second pole with coupled inductors. The relationship of locking range and the coupling factor is also presented. Based on the analysis, five proposed H-band (220-325GHz) divide-by-2 ILFD are fabricated in 40nm CMOS process. One of the ILFDs has the highest injection-locked frequency of 298.7GHz, consumes 11.7mW from a 0.9V power supply; the chip area is 0.51 0.321mm2.
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