Mutli-Band Voltage Controlled Osillator And Three-Phase Voltage Controlled Ring Osillator
碩士 === 國立臺灣科技大學 === 電子工程系 === 100 === In wireless communication system, frequency synthesizers are used to implement the frequency up/down converting of signal. In a frequency synthesizer, voltage-controlled oscillator (VCO) and divider are the key blocks. For VCOs, low phase-noise output is require...
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ndltd-TW-100NTUS54281232015-10-13T21:17:26Z http://ndltd.ncl.edu.tw/handle/20923427919688914489 Mutli-Band Voltage Controlled Osillator And Three-Phase Voltage Controlled Ring Osillator 多頻帶電壓控制振盪器與三相位環型壓控振盪器之設計 Yao-Tsu Chen 陳耀祖 碩士 國立臺灣科技大學 電子工程系 100 In wireless communication system, frequency synthesizers are used to implement the frequency up/down converting of signal. In a frequency synthesizer, voltage-controlled oscillator (VCO) and divider are the key blocks. For VCOs, low phase-noise output is required to avoid corrupting the mixer-converted signal by close interfering tones. The output of the VCO is divided down by the frequency divider which requires operating at high frequencies, wide operating range and lower power consumption. First, this chip presents A Dual-Band VCO By Transformer Coupling,using the TSMC 0.18um 1P6M CMOS process. Measurement results show that at the supply voltage of 1.2 V, the core power consumption is 4.21 mW,the output phase noise of the VCO is -117.77 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 8.576 GHz, and the figure of merit is -190.22 dBc/Hz at High Band, the output phase noise of the VCO is -125.63 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 3.355 GHz, and the figure of merit is -190.3 dBc/Hz at Low Band, the die area is 0.995 × 0.55 mm2. Second, this chip presents A Dual-Band VCO Using Varactor-swiching Mode,using the TSMC 0.18um SiGe 3P6M BiCMOS process. Measurement results show that at the supply voltage of 0.7 V, the core power consumption is 2.6 mW,the output phase noise of the VCO is -117.78 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 9.145 GHz, and the figure of merit is -192.9 dBc/Hz at High Band, the output phase noise of the VCO is -119.92 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 5.442 GHz, and the figure of merit is -190.5 dBc/Hz at Low Band, the die area is 1.04 × 0.755 mm2. Third, this chip presents a Triple-Band Voltage Controlled Osillator using the TSMC 0.18um 1P6M CMOS process. Measurement results show that at the supply voltage of 0.8 V, the core power consumption is 3.12 mW,the output phase noise of the VCO is -118.44 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 7.13 GHz, and the figure of merit is -190.5 dBc/Hz at Band 1, the output phase noise of the VCO is -122.49 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 5.643 GHz, and the figure of merit is -192.6 dBc/Hz at Band 2 , the output phase noise of the VCO is -125.75 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 3.405 GHz, and the figure of merit is -191.4 dBc/Hz at Band 3, the die area is 0.684 × 0.754 mm2. Fourth, this chip presents a Three-Phase VCO Using Common-Gate Tuning and Coupling Transistors using the TSMC 0.35um 2P4M CMOS process. Measurement results show that at the supply voltage of 1.8 V, the output phase noise of the VCO is -125.96 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 5.17 GHz, and the figure of merit is -190.3 dBc/Hz. The core power consumption is 9.5 mW, the die area is 1.172 × 0.968 mm2. Sheng-lyang Jang 張勝良 2012 學位論文 ; thesis 124 en_US |
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碩士 === 國立臺灣科技大學 === 電子工程系 === 100 === In wireless communication system, frequency synthesizers are used to implement the frequency up/down converting of signal. In a frequency synthesizer, voltage-controlled oscillator (VCO) and divider are the key blocks. For VCOs, low phase-noise output is required to avoid corrupting the mixer-converted signal by close interfering tones. The output of the VCO is divided down by the frequency divider which requires operating at high frequencies, wide operating range and lower power consumption.
First, this chip presents A Dual-Band VCO By Transformer Coupling,using the TSMC 0.18um 1P6M CMOS process. Measurement results show that at the supply voltage of 1.2 V, the core power consumption is 4.21 mW,the output phase noise of the VCO is -117.77 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 8.576 GHz, and the figure of merit is -190.22 dBc/Hz at High Band, the output phase noise of the VCO is -125.63 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 3.355 GHz, and the figure of merit is -190.3 dBc/Hz at Low Band, the die area is 0.995 × 0.55 mm2.
Second, this chip presents A Dual-Band VCO Using Varactor-swiching Mode,using the TSMC 0.18um SiGe 3P6M BiCMOS process. Measurement results show that at the supply voltage of 0.7 V, the core power consumption is 2.6 mW,the output phase noise of the VCO is -117.78 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 9.145 GHz, and the figure of merit is -192.9 dBc/Hz at High Band, the output phase noise of the VCO is -119.92 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 5.442 GHz, and the figure of merit is -190.5 dBc/Hz at Low Band, the die area is 1.04 × 0.755 mm2.
Third, this chip presents a Triple-Band Voltage Controlled Osillator using the TSMC 0.18um 1P6M CMOS process. Measurement results show that at the supply voltage of 0.8 V, the core power consumption is 3.12 mW,the output phase noise of the VCO is -118.44 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 7.13 GHz, and the figure of merit is -190.5 dBc/Hz at Band 1, the output phase noise of the VCO is -122.49 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 5.643 GHz, and the figure of merit is -192.6 dBc/Hz at Band 2 , the output phase noise of the VCO is -125.75 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 3.405 GHz, and the figure of merit is -191.4 dBc/Hz at Band 3, the die area is 0.684 × 0.754 mm2.
Fourth, this chip presents a Three-Phase VCO Using Common-Gate Tuning and Coupling Transistors using the TSMC 0.35um 2P4M CMOS process. Measurement results show that at the supply voltage of 1.8 V, the output phase noise of the VCO is -125.96 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 5.17 GHz, and the figure of merit is -190.3 dBc/Hz. The core power consumption is 9.5 mW, the die area is 1.172 × 0.968 mm2.
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author2 |
Sheng-lyang Jang |
author_facet |
Sheng-lyang Jang Yao-Tsu Chen 陳耀祖 |
author |
Yao-Tsu Chen 陳耀祖 |
spellingShingle |
Yao-Tsu Chen 陳耀祖 Mutli-Band Voltage Controlled Osillator And Three-Phase Voltage Controlled Ring Osillator |
author_sort |
Yao-Tsu Chen |
title |
Mutli-Band Voltage Controlled Osillator And Three-Phase Voltage Controlled Ring Osillator |
title_short |
Mutli-Band Voltage Controlled Osillator And Three-Phase Voltage Controlled Ring Osillator |
title_full |
Mutli-Band Voltage Controlled Osillator And Three-Phase Voltage Controlled Ring Osillator |
title_fullStr |
Mutli-Band Voltage Controlled Osillator And Three-Phase Voltage Controlled Ring Osillator |
title_full_unstemmed |
Mutli-Band Voltage Controlled Osillator And Three-Phase Voltage Controlled Ring Osillator |
title_sort |
mutli-band voltage controlled osillator and three-phase voltage controlled ring osillator |
publishDate |
2012 |
url |
http://ndltd.ncl.edu.tw/handle/20923427919688914489 |
work_keys_str_mv |
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