| Summary: | 碩士 === 國立臺灣科技大學 === 電子工程系 === 100 === This thesis presents the design and realization of Si-based and SiGe-based optical receiving and light emitting integrated circuits, including limiting amplifier, burst-mode automatic gain controlled (AGC) transimpedance amplifier and light receiving and emitting device.
First, the designs of transimpedance and limiting amplifier using the TSMC 0.18μm CMOS 1P6M process are made. The RGC-type input stage is used in the circuits. It effectively isolate input parasitic capacitance, and therefore increases bandwidth performance. By adding limiting amplifier, the output swing is raised and restricts output voltage to the logic level. At 1.8V and 0.25pF input capacitance to our design, the simulated bandwidth is 3.7GHz for a gain of 73.9dBΩ and a total power consumption of 58.2mW.
Secondly, we present a design of a burst-mode receiving circuit using RGC-type TIA with AGC circuit and variable gain amplifier (VGA). We use the TSMC 0.18μm SiGe BiCMOS process. At 1.8V and 0.25pF input capacitance to our design, the simulated dynamic gain range, the corresponding dynamic bandwidth range, and the total power consumption are 58.6~77.2dBΩ, 2.5~3.6GHz, and 84.9mW respectively.
Finally, we use the TSMC 0.35μm CMOS 2P4M process and the TSMC 0.18μm SiGe BiCMOS process to realize light receiving and emitting devices. Under the illumination of laser at 850 nm, the measured responsibilities are 0.0310A/W, 0.0011A/W, and 0.2350A/W for device areas of 0.118mm×0.118mm, 0.124mm×0.124mm, and 0.72mm×0.60mm respectively. Moreover, an optical alignment experiment is carried out by using two of our chips, one operating in light emitting mode and the other in light receiving mode. The alignment sensitivity is 0.121μV/μm.
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