Desing and Implementation of a Boost-fed Constent-frequency Half-Bridge Series Resonant Converter with Synchronous Rectification

• Main Authors: Tsang-chih Chen, 陳滄智
• Other Authors: Yu-Kang Lo
• Format: Others
• Language: zh-TW
• Published: 2012
• Online Access: http://ndltd.ncl.edu.tw/handle/19437579388503666546

碩士 === 國立臺灣科技大學 === 電子工程系 === 100 === This thesis presents a constant-frequency series resonant converter (SRC) with a pre-stage circuit of an interleaved DCM boost converter with a varied duty cycle regulated by output-voltage feedback. Under full-range load comditions, the series resonant converter is operated at the first resonant-frequency to achieve optimal efficiency performance. Synchronous Rectifier (SR) is also used to reduce the secondary rectification loss. The gating signals for synchromous rectifier are from a SR control IC to follow primary-side signals. For the studied SRC circuit, the zero-voltage-switcing (ZVS) at primary-side switches can reduce the switching losses at light-load condition due to resonant-frequency operation while the synchronous rectifier reduces the secondary rectification loss at heavy-load condition.. Finally, an 150W/19V laboratory prototype composed of a power factor corrector (PFC) and the studied boost-fed constant-frequency series resonant converter was implemented and tested. Theoretical analyses are verified with the experimental results. The measured efficiency can be higher than 90% at 2A light-load to 8A heavy-load conditions.