Design and Implementation of an EDP-based Dynamic Voltage and Frequency Scaling Mechanism

• Main Authors: Tse-Hsiang Chen 陳則翔, 陳則翔
• Other Authors: 梁文耀
• Format: Others
• Language: zh-TW
• Published: 2012
• Online Access: http://ndltd.ncl.edu.tw/handle/y97n82

碩士 === 國立臺北科技大學 === 資訊工程系研究所 === 100 === Energy saving is an important issue, especially for the handheld devices. The dynamic voltage and frequency scaling (DVFS) is one of the mechanisms in the energy saving research area. DVFS can be used to reduce energy consumption of a processor while tasks are running. However, reducing the frequency for a processor might not induce minimized energy consumption, since the execution time will be extended due to the frequency being decreased and the program will consume extra energy during this extended period. As a result, the induced extra energy could be higher than what has been saved. Experiment results indicated that the execution time is an important factor for the energy consumption. The EDP (energy and delay product) metric[1] has been used to evaluate the trade-off between energy consumption and execution time. In this thesis, an approximation equation based on the correlation of the memory access rate and the critical speed for the minimum EDP metric is conducted for frequency and voltage prediction. The correlation equation can thus be deduced from the relationship and used at task execution time to find a frequency. According to the correlation equation, an appropriate frequency (called CSEDP) can be found to minimize the EDP. The energy saving DVFS algorithm based on the correlation equation is presented in this thesis. The algorithm has been implemented on Linux as a kernel-space power manager. The experiment result shows that our algorithm performed better than the commonly used Linux Ondemand Governor[2]. It indicates that the EDP values are lower than that of Ondemand from 0.429% to 14.596% with 5.27% in average.