Low Cost and Low Energy-Delay-Product Sub-threshold Logic Design
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 101 === Sub-threshold operation has been shown to be a promising approach for ultra-low power applications, such as portable mobile devices, biomedical electronic systems and wireless sensor network. However, operating logic circuits in the sub-threshold regime would...
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ndltd-TW-101NCKU54422632015-10-13T22:57:41Z http://ndltd.ncl.edu.tw/handle/65954650473020057391 Low Cost and Low Energy-Delay-Product Sub-threshold Logic Design 具有低成本與低能量時間積之次臨界電壓邏輯電路設計 Bo-ZhouKe 柯柏州 碩士 國立成功大學 電機工程學系碩博士班 101 Sub-threshold operation has been shown to be a promising approach for ultra-low power applications, such as portable mobile devices, biomedical electronic systems and wireless sensor network. However, operating logic circuits in the sub-threshold regime would seriously degrade the ratio of transistor driving current to leakage current and increase the sensitivity of process variations, thus increasing the possibility of logic functional failures. To increase the robustness of logic circuit in the sub-threshold regime, we propose a sub-threshold logic style called N-Critical Schmitt-Trigger logic. This structure could not only effectively increase the ratio of logic circuit driving current to leakage current, but also reduce the sensitivity of process variation when operated in the sub-threshold regime. In this thesis, the multiplier and accumulator (MAC) circuits are implemented in TSMC 90nm to demonstrate the feasibility of our proposed N-critical Schmitt-Trigger logic in the sub-threshold regime. According to post-layout simulation results, the MAC circuit implemented with our proposed logic structure shows 40% area overhead reduction and 6x energy-delay-product (EDP) improvement at 0.2V when compared with conventional Schmitt-Trigger logic structure[1]. Lih-Yih Chiou 邱瀝毅 2013 學位論文 ; thesis 66 zh-TW |
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碩士 === 國立成功大學 === 電機工程學系碩博士班 === 101 === Sub-threshold operation has been shown to be a promising approach for ultra-low power applications, such as portable mobile devices, biomedical electronic systems and wireless sensor network. However, operating logic circuits in the sub-threshold regime would seriously degrade the ratio of transistor driving current to leakage current and increase the sensitivity of process variations, thus increasing the possibility of logic functional failures. To increase the robustness of logic circuit in the sub-threshold regime, we propose a sub-threshold logic style called N-Critical Schmitt-Trigger logic. This structure could not only effectively increase the ratio of logic circuit driving current to leakage current, but also reduce the sensitivity of process variation when operated in the sub-threshold regime. In this thesis, the multiplier and accumulator (MAC) circuits are implemented in TSMC 90nm to demonstrate the feasibility of our proposed N-critical Schmitt-Trigger logic in the sub-threshold regime. According to post-layout simulation results, the MAC circuit implemented with our proposed logic structure shows 40% area overhead reduction and 6x energy-delay-product (EDP) improvement at 0.2V when compared with conventional Schmitt-Trigger logic structure[1].
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author2 |
Lih-Yih Chiou |
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Lih-Yih Chiou Bo-ZhouKe 柯柏州 |
author |
Bo-ZhouKe 柯柏州 |
spellingShingle |
Bo-ZhouKe 柯柏州 Low Cost and Low Energy-Delay-Product Sub-threshold Logic Design |
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Bo-ZhouKe |
title |
Low Cost and Low Energy-Delay-Product Sub-threshold Logic Design |
title_short |
Low Cost and Low Energy-Delay-Product Sub-threshold Logic Design |
title_full |
Low Cost and Low Energy-Delay-Product Sub-threshold Logic Design |
title_fullStr |
Low Cost and Low Energy-Delay-Product Sub-threshold Logic Design |
title_full_unstemmed |
Low Cost and Low Energy-Delay-Product Sub-threshold Logic Design |
title_sort |
low cost and low energy-delay-product sub-threshold logic design |
publishDate |
2013 |
url |
http://ndltd.ncl.edu.tw/handle/65954650473020057391 |
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