Multiple Outputs Gate Driver on Array Technology for TFT-LCD Panels

碩士 === 國立交通大學 === 光電工程研究所 === 101 === It is popular and inevitable for us to have many instruments with display screens in our life. The requirements of qualities whatever in image or appearance of apparatus have become more sophisticated. A revolutionary technology of TFT LCDs has been developed qu...

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Bibliographic Details
Main Authors: Chen, Yung-Han, 陳永翰
Other Authors: Liu, Po-Tsun
Format: Others
Language:en_US
Published: 2013
Online Access:http://ndltd.ncl.edu.tw/handle/50201077687920505448
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Summary:碩士 === 國立交通大學 === 光電工程研究所 === 101 === It is popular and inevitable for us to have many instruments with display screens in our life. The requirements of qualities whatever in image or appearance of apparatus have become more sophisticated. A revolutionary technology of TFT LCDs has been developed quickly which is system-on-panel (SOP) applications. However, SOP application has the potential to realize compact, highly reliable, and high resolution display by integrating functional circuits within a display. Besides, the cost of panel becomes lower, as well as the higher yield rate can be achieved.In the driver system of thin-film transistor liquid-crystal display (TFT-LCD), gate drivers (or scan drivers) are the essential parts that sequentially control the gates of pixel TFTs. Therefore, the pixel TFTs can transfer correct data and store in the liquid crystal and storage capacitors. Recently, in the consumer electronic display products, the gate driver circuits have been integrated into the bottom plate glass of LCD module rather than providing form the conventional ICs. Although the electron mobility in a-Si TFTs is extremely low (≈0.3cm2/V-s), the traits of high uniformity and low cost of manufacturing a-Si TFTs have created the trend towards gate driver on array (GOA). Moreover, the application of GOA decreases the cost of ICs and results in the module lighter and thinner. In this thesis, we have proposed two main kinds of gate driver the for the flat panel application. First multiple outputs gate driver by sharing noise prevent mechanism has proposed. The main design concept is using four clock signals to achieve single path conduction for low noise performance and narrow bezel purpose. Second, we will offer another theory of gate driver design which includes bi-direction scanning and use the “Noise prevent share” mechanism to keep the integrity of circuits when it be commercialized. Furthermore, we hope this design can develop toward the way not only sharing more noise prevent units for the purpose of size reduction, but lower the unnecessary noise in the future.