Investigation and Analysis of FinFET and Trigate Devices, Logic and Analog Circuits, and SRAM
碩士 === 國立交通大學 === 電子研究所 === 101 === In this thesis, we present a comprehensive comparative analysis of FinFET and Trigate in terms of device characteristics, stability of 6T SRAM cell, logic circuits and Widlar current source. The critical intrinsic random variations, including fin Line Edge Rou...
Main Authors: | Pao, Chia-Hao, 包家豪 |
---|---|
Other Authors: | Chuang, Ching-Te |
Format: | Others |
Language: | en_US |
Published: |
2012
|
Online Access: | http://ndltd.ncl.edu.tw/handle/66372196298044298147 |
Similar Items
-
Asymmetric Drain Extension Dual-kk Trigate Underlap FinFET Based on RF/Analog Circuit
by: Ke Han, et al.
Published: (2017-11-01) -
Design and Analysis of Nanoscale FinFET and Tunnel FET Devices for Ultra-Low-Power SRAM, Logic and Analog Applications
by: Chen, Yin-Nien, et al.
Published: (2016) -
Design of Adiabatic SRAM and CAM Using FinFET Devices
by: Su,Chien-Wei, et al.
Published: (2016) -
A Unified Depletion/Inversion Model for Heterojunction Trigate FinFETs DC Characteristics
by: Qamar-Ud-Din Memon, et al.
Published: (2021-01-01) -
A New Theory and Its Experimental Verifications of Geometric Variation in Advanced Trigate FinFETs
by: Fan, Yang-Chun, et al.
Published: (2016)