ACER: An Agglomerative Clustering Based Electrode Addressing and Routing Algorithm for Pin-Constrained EWOD Chips

• Main Authors: Chang, Chun-Hung, 張鈞鴻
• Other Authors: Chen, Hung-Ming
• Format: Others
• Language: en_US
• Published: 2012
• Online Access: http://ndltd.ncl.edu.tw/handle/29422036393277928961

碩士 === 國立交通大學 === 電子研究所 === 101 === With the increasing design complexities, the design of pin-constrained electrowetting-on-dielectric (EWOD) biochips is of practical importance for the emerging market-place. However, as the system complexity increases, the number of control pads also rapidly increases that may necessitate multiple PCB layers, which potentially raise the price of fabrication cost. To tackle this problem, we present ACER, an agglomerative clustering-based electrode addressing and routing algorithm for pin-constrained EWOD chip that solves both pin merging and routing effectively. An agglomerative clustering technique is applied to determine merging priority of electrical pins. Furthermore, in consideration of routability, we propose an effective estimation method to incorporate routability to our objective during clustering. At routing stage, we formulate the consequent multi-source multi-sink escape routing problem using a set of integer linear constraints. Our algorithm can handle designs with and without obstacles. Compared to work [8] without considering presence of obstacles, ACER can further reduce activation sequences by 11% with 151% reduction in routed wirelength within comparable execution time. In comparison with obstacle aware algorithm proposed in [3], our algorithm can achieve equivalent reduction using 25% less routed wirelength.