A Design with Dual Phase Dual Level PWM For Class D Amplifier
碩士 === 國立交通大學 === 電機學院電機與控制學程 === 101 === This thesis proposes the Dual Phase Dual Level PWM for Class D Amplifier that consists of a triangle wave generator circuit with Dual-level and Dual-phase sampling carrier to modulate with input signal，consists of a noise shaping filter to de-noise and consi...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/s9ck73 |
| Summary: | 碩士 === 國立交通大學 === 電機學院電機與控制學程 === 101 === This thesis proposes the Dual Phase Dual Level PWM for Class D Amplifier that consists of a triangle wave generator circuit with Dual-level and Dual-phase sampling carrier to modulate with input signal，consists of a noise shaping filter to de-noise and consists of a multi power switching circuit to reduce the EMI and distortion.
The MLMP-PWM based Class D through the use of technology without any static current consumption can have the advantage of high power efficiency. Although the square output waveform will have the problem of EMI and THD, the proposed Class D can use Dual-level Dual-phase triangle carrier to sample input signal to lower EMI and distortion and switch multi-level output voltage to drive output load for DPDL-PWM waveform similar to continuous sine wave.
The proposed Class D achieves high efficiency, low EMI, and low THD by using the DPDL-PWM technology for portable products.
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