VLSI Implementation of Scalable Video Compressor for Digital Home

碩士 === 國立中央大學 === 電機工程學系 === 101 === Wireless digital home environment is constructed to serve the multiple client and multiple video source requests without the need on wire transmission. To serve these issues, a new video compressor for lossless and near lossless compression is one of the major co...

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Bibliographic Details
Main Authors: Zong-hong Li, 李宗鴻
Other Authors: Tsung-Han Tsai
Format: Others
Language:en_US
Published: 2012
Online Access:http://ndltd.ncl.edu.tw/handle/51442000802726197305
Description
Summary:碩士 === 國立中央大學 === 電機工程學系 === 101 === Wireless digital home environment is constructed to serve the multiple client and multiple video source requests without the need on wire transmission. To serve these issues, a new video compressor for lossless and near lossless compression is one of the major components achieving wireless mobile, multiple access home entertainment system. In this thesis, a new lossless compression codec, the size and SNR scalable image-video compression codec (SS-SIVC) is proposed. According to the probability analysis, two-pass quality driven bit plane sequencer is presented. A complete flowchart is constructed to conclude the proposed work. Quality driven magnitude refinement is also proposed to optimize the SNR scalability. According to the experiment results, the computation time of proposed work is almost one third of openJPEG (JEPG 2000) while the compression ratio is only 0.04 behind. According to the results, a computation efficient size and SNR scalable codec is concluded. The proposed work is also implemented in hardware with VLSI architecture. The proposed SS-SIVC codec is fully compatible for Full-HD 1080p@30Hz. Furthermore, with capacity of flexible parallelism, the hardware architecture can be improved for advanced display specifications, such as QHD and QFHD.