Low-Power Dependable Content Addressable Memory Based on Hamming Code Precomputation

• Main Authors: Shih-Sheng Cheng, 鄭時昇
• Other Authors: Tsung-Chu Huang
• Format: Others
• Language: zh-TW
• Published: 2013
• Online Access: http://ndltd.ncl.edu.tw/handle/85665580477783730368

碩士 === 國立彰化師範大學 === 電子工程學系 === 101 === Abstract Content addressable memory has the advantage of high-speed data searching, so it is widely used in communication network and cache system. However, owing to mass and parallel comparison, the area overhead, power dissipation and reliability are still the major issues for content addressable memory device. Precomputation is usually applied for predictive speedup and power disabling. In this paper low-power precomputation is surveyed in view of subspace codes. Four efficient subspace codes are proposed for precomputation based content address memory design. The side benefits are also surveyed and analyzed in the experiments. From our evaluations the MSB concept can be combined with m/n codes or sentry tagging with few overhead. Berger and m/n codes can be applied to hold the equal-weight property for cell reduction or searching-once. The proposed precomputation using Hamming codes can take more benefits on small checkers and error correction. The proposed precomputation using Hamming codes can take more benefits on low-power, small checkers and error correction. The novel Hamming codes are presented for improve the power consumption of 30%. Keywords: Precomputation, Subspace code, Content addressable memory,Hamming code