Analysis and Design of Clock Generators in 65-nm CMOS Technology

博士 === 國立臺灣大學 === 電子工程學研究所 === 101 ===

Bibliographic Details
Main Authors: I-Ting Lee, 李宜庭
Other Authors: 劉深淵
Format: Others
Language:en_US
Published: 2013
Online Access:http://ndltd.ncl.edu.tw/handle/90753289002910706773
id ndltd-TW-101NTU05428023
record_format oai_dc
spelling ndltd-TW-101NTU054280232016-03-23T04:13:55Z http://ndltd.ncl.edu.tw/handle/90753289002910706773 Analysis and Design of Clock Generators in 65-nm CMOS Technology 時脈產生器之分析與設計於65奈米CMOS技術 I-Ting Lee 李宜庭 博士 國立臺灣大學 電子工程學研究所 101 劉深淵 2013 學位論文 ; thesis 100 en_US
collection NDLTD
language en_US
format Others
sources NDLTD
description 博士 === 國立臺灣大學 === 電子工程學研究所 === 101 ===
author2 劉深淵
author_facet 劉深淵
I-Ting Lee
李宜庭
author I-Ting Lee
李宜庭
spellingShingle I-Ting Lee
李宜庭
Analysis and Design of Clock Generators in 65-nm CMOS Technology
author_sort I-Ting Lee
title Analysis and Design of Clock Generators in 65-nm CMOS Technology
title_short Analysis and Design of Clock Generators in 65-nm CMOS Technology
title_full Analysis and Design of Clock Generators in 65-nm CMOS Technology
title_fullStr Analysis and Design of Clock Generators in 65-nm CMOS Technology
title_full_unstemmed Analysis and Design of Clock Generators in 65-nm CMOS Technology
title_sort analysis and design of clock generators in 65-nm cmos technology
publishDate 2013
url http://ndltd.ncl.edu.tw/handle/90753289002910706773
work_keys_str_mv AT itinglee analysisanddesignofclockgeneratorsin65nmcmostechnology
AT lǐyítíng analysisanddesignofclockgeneratorsin65nmcmostechnology
AT itinglee shímàichǎnshēngqìzhīfēnxīyǔshèjìyú65nàimǐcmosjìshù
AT lǐyítíng shímàichǎnshēngqìzhīfēnxīyǔshèjìyú65nàimǐcmosjìshù
_version_ 1718211151008890880