Dynamic Parametric Design and Feasibility Assessment for the High Resistance MeasuringSystem
碩士 === 國立臺北科技大學 === 工業工程與管理系碩士班 === 101 === With the surface mount device, the printed circuit board (PCB) revolves in the direction of miniaturization and high functional density. The presence of flux residues may result in decreasing surface insulation resistance (SIR) and/or occurring of metal io...
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ndltd-TW-101TIT050310362019-05-15T21:02:28Z http://ndltd.ncl.edu.tw/handle/v37djt Dynamic Parametric Design and Feasibility Assessment for the High Resistance MeasuringSystem 高阻量測系統之動態參數設計及可行性分析 Meng-Hsun Liu 劉孟勳 碩士 國立臺北科技大學 工業工程與管理系碩士班 101 With the surface mount device, the printed circuit board (PCB) revolves in the direction of miniaturization and high functional density. The presence of flux residues may result in decreasing surface insulation resistance (SIR) and/or occurring of metal ions electrochemical migration (ECM). These scenarios may cause circuit short failure. High resistance measuring system is to measure the SIR values of the PCB according to the safety regulations. In this study, we construct the Dynamic Parametric Design to determine the optimal test parameters for the high resistance measuring system. In SIR/ECM test, the SIR is in the range of 109 - 1011 ohms. Thus, the signal factors is with three levels, 109 ohms , 1010 ohms and 1011 ohms. While the SIR/ECM testing process involves measuring small amount of current, the noise factor considers extrinsic noise, such as electromagnetic waves, metallic conductors and operator''s behaviors. The optimal test parameters are measuring cycle 390 ms, test voltage 100V, charge time 15 seconds and pause time 100 seconds. Secondly, the measurement system analysis is conducted with the optimal parameters. We confirmed that the measuring system variation is very small (0.98%) compared to the variation between sample parts (99.02%). The measuring capability index was 9.88%, which is in an acceptable range (<10%). Thus, the system has sufficient capability to effectively identify the PCBs SIR decreased and occurrence of ECM phenomenon. Finally, we found that a total of 61 efficiently values can be obtained at 20 minutes based on the industry standard IPC-TM 650 2.6.3.7 if the above mentioned optimal parameters are applied. The use of additional test capacity may impact the test effectiveness. The results show that when the system is fully loaded , the ideal test parameters are measuring cycle 390 ms/per time, test voltage 100V, charge time 5 seconds and pause time 100 seconds. The corresponding SN ratio 21.95db. Chien-Yi Huang 黃乾怡 2013 學位論文 ; thesis 62 zh-TW |
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碩士 === 國立臺北科技大學 === 工業工程與管理系碩士班 === 101 === With the surface mount device, the printed circuit board (PCB) revolves in the direction of miniaturization and high functional density. The presence of flux residues may result in decreasing surface insulation resistance (SIR) and/or occurring of metal ions electrochemical migration (ECM). These scenarios may cause circuit short failure. High resistance measuring system is to measure the SIR values of the PCB according to the safety regulations.
In this study, we construct the Dynamic Parametric Design to determine the optimal test parameters for the high resistance measuring system. In SIR/ECM test, the SIR is in the range of 109 - 1011 ohms. Thus, the signal factors is with three levels, 109 ohms , 1010 ohms and 1011 ohms. While the SIR/ECM testing process involves measuring small amount of current, the noise factor considers extrinsic noise, such as electromagnetic waves, metallic conductors and operator''s behaviors. The optimal test parameters are measuring cycle 390 ms, test voltage 100V, charge time 15 seconds and pause time 100 seconds.
Secondly, the measurement system analysis is conducted with the optimal parameters. We confirmed that the measuring system variation is very small (0.98%) compared to the variation between sample parts (99.02%). The measuring capability index was 9.88%, which is in an acceptable range (<10%). Thus, the system has sufficient capability to effectively identify the PCBs SIR decreased and occurrence of ECM phenomenon.
Finally, we found that a total of 61 efficiently values can be obtained at 20 minutes based on the industry standard IPC-TM 650 2.6.3.7 if the above mentioned optimal parameters are applied. The use of additional test capacity may impact the test effectiveness. The results show that when the system is fully loaded , the ideal test parameters are measuring cycle 390 ms/per time, test voltage 100V, charge time 5 seconds and pause time 100 seconds. The corresponding SN ratio 21.95db.
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author2 |
Chien-Yi Huang |
author_facet |
Chien-Yi Huang Meng-Hsun Liu 劉孟勳 |
author |
Meng-Hsun Liu 劉孟勳 |
spellingShingle |
Meng-Hsun Liu 劉孟勳 Dynamic Parametric Design and Feasibility Assessment for the High Resistance MeasuringSystem |
author_sort |
Meng-Hsun Liu |
title |
Dynamic Parametric Design and Feasibility Assessment for the High Resistance MeasuringSystem |
title_short |
Dynamic Parametric Design and Feasibility Assessment for the High Resistance MeasuringSystem |
title_full |
Dynamic Parametric Design and Feasibility Assessment for the High Resistance MeasuringSystem |
title_fullStr |
Dynamic Parametric Design and Feasibility Assessment for the High Resistance MeasuringSystem |
title_full_unstemmed |
Dynamic Parametric Design and Feasibility Assessment for the High Resistance MeasuringSystem |
title_sort |
dynamic parametric design and feasibility assessment for the high resistance measuringsystem |
publishDate |
2013 |
url |
http://ndltd.ncl.edu.tw/handle/v37djt |
work_keys_str_mv |
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