Implementation of Narrow-band PLC System and Analog Front End Based on G3 Specification
碩士 === 國立成功大學 === 電腦與通信工程研究所 === 102 === This thesis implements the power-line communication systems with hardware components and simulates power-line communication systems with software. Compare the implementation and simulation results with each other and design the analog front-end circuit after...
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ndltd-TW-102NCKU56520962019-05-15T21:42:47Z http://ndltd.ncl.edu.tw/handle/98a3f7 Implementation of Narrow-band PLC System and Analog Front End Based on G3 Specification 基於G3規格的窄頻電力線通訊類比前端與系統實作 Guang-YiLi 李洸毅 碩士 國立成功大學 電腦與通信工程研究所 102 This thesis implements the power-line communication systems with hardware components and simulates power-line communication systems with software. Compare the implementation and simulation results with each other and design the analog front-end circuit after simulation. The specification we used is G3. G3 is a physical layer specification for narrow-band power-line communication. This specification uses orthogonal frequency division multiplexing (OFDM) for data transmission and operates in the low-frequency band, from 35.9 kHz to 90.6 kHz. This thesis implements the hardware architecture of the transceiver based on G3 specification. The on-shelf hardware modules, including Xilinx Virtex-4 FPGA development board and P240 Analog Module , are used for the implementation, but the Analog Front-end is my own realization. Finally, this thesis will test the performance of the overall hardware architecture and discuss the difficulties we met while through the hardware implementation. Szu-Lin Su 蘇賜麟 2014 學位論文 ; thesis 43 zh-TW |
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碩士 === 國立成功大學 === 電腦與通信工程研究所 === 102 === This thesis implements the power-line communication systems with hardware components and simulates power-line communication systems with software. Compare the implementation and simulation results with each other and design the analog front-end circuit after simulation. The specification we used is G3. G3 is a physical layer specification for narrow-band power-line communication. This specification uses orthogonal frequency division multiplexing (OFDM) for data transmission and operates in the low-frequency band, from 35.9 kHz to 90.6 kHz. This thesis implements the hardware architecture of the transceiver based on G3 specification. The on-shelf hardware modules, including Xilinx Virtex-4 FPGA development board and P240 Analog Module , are used for the implementation, but the Analog Front-end is my own realization. Finally, this thesis will test the performance of the overall hardware architecture and discuss the difficulties we met while through the hardware implementation.
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Szu-Lin Su |
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Szu-Lin Su Guang-YiLi 李洸毅 |
author |
Guang-YiLi 李洸毅 |
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Guang-YiLi 李洸毅 Implementation of Narrow-band PLC System and Analog Front End Based on G3 Specification |
author_sort |
Guang-YiLi |
title |
Implementation of Narrow-band PLC System and Analog Front End Based on G3 Specification |
title_short |
Implementation of Narrow-band PLC System and Analog Front End Based on G3 Specification |
title_full |
Implementation of Narrow-band PLC System and Analog Front End Based on G3 Specification |
title_fullStr |
Implementation of Narrow-band PLC System and Analog Front End Based on G3 Specification |
title_full_unstemmed |
Implementation of Narrow-band PLC System and Analog Front End Based on G3 Specification |
title_sort |
implementation of narrow-band plc system and analog front end based on g3 specification |
publishDate |
2014 |
url |
http://ndltd.ncl.edu.tw/handle/98a3f7 |
work_keys_str_mv |
AT guangyili implementationofnarrowbandplcsystemandanalogfrontendbasedong3specification AT lǐguāngyì implementationofnarrowbandplcsystemandanalogfrontendbasedong3specification AT guangyili jīyúg3guīgédezhǎipíndiànlìxiàntōngxùnlèibǐqiánduānyǔxìtǒngshízuò AT lǐguāngyì jīyúg3guīgédezhǎipíndiànlìxiàntōngxùnlèibǐqiánduānyǔxìtǒngshízuò |
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