Anisotropic Probabilistic Neural Network for Image Interpolation and Video Scaling
博士 === 國立中央大學 === 資訊工程學系 === 102 === For the reason that the demand of high resolution display, this dissertation proposes a novel image interpolation method based on an anisotropic probabilistic neural network (APNN). This APNN interpolation method adjusts the smoothing parameters for varied smooth...
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ndltd-TW-102NCU053920072015-10-13T23:16:13Z http://ndltd.ncl.edu.tw/handle/36807334134851465257 Anisotropic Probabilistic Neural Network for Image Interpolation and Video Scaling 應用於視訊縮放與影像插補的非等向機率神經網路 Chia-ming Kuo 郭家銘 博士 國立中央大學 資訊工程學系 102 For the reason that the demand of high resolution display, this dissertation proposes a novel image interpolation method based on an anisotropic probabilistic neural network (APNN). This APNN interpolation method adjusts the smoothing parameters for varied smooth/edge regions, and considers edge direction. For the optimization of smoothness/sharpness, a single neuron, with particle swarm optimization (PSO) algorithm, is used for the adaptive estimation of APNN’s parameters at each image pixel. The experimental results demonstrate that the proposed method achieves better sharpness enhancement at edge regions, and reveals the noise reduction at smooth region. Image interpolation requires real-time interpolating to be realized in an embedded system. This study proposes an approach to implement an APNN based on FPGA to interpolate images. The APNN layers were designed with fixed-point arithmetic-employing, synthesizable, VHDL code for FPGA implementation. The FPGA-based APNN was taken as an accelerator of embedded processor, which can be an effective computation module for APNN image interpolation. Both software-based and FPGA-based image interpolation were implemented and evaluated using an APNN. Experimental results showed that the FPGA implementation was approximately 158 times faster than that of the embedded processor with lower loss quality. Pipeline architecture is used in video scaler to increase the throughput. The lookup table method is used to replace single neuron in estimation of smoothing parameter to improve the speed of operation. To support the many possibilities of input and output configurations, the video scaler with separate clock domains using asynchronous FIFO buffer. For the FPGA, the clock frequency report showed the APNN interpolation output maximum frequency is 79.64MHz. The critical frequency is 76.96MHz for the modules produce the inputs of APNN. While input and output frequency are at 62.21 MHz, the max input and output rectangle size is 1920x1080 to produces video at 30 frames per second (FPS). Ching-Han Chen 陳慶瀚 2013 學位論文 ; thesis 104 en_US |
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博士 === 國立中央大學 === 資訊工程學系 === 102 === For the reason that the demand of high resolution display, this dissertation proposes a novel image interpolation method based on an anisotropic probabilistic neural network (APNN). This APNN interpolation method adjusts the smoothing parameters for varied smooth/edge regions, and considers edge direction. For the optimization of smoothness/sharpness, a single neuron, with particle swarm optimization (PSO) algorithm, is used for the adaptive estimation of APNN’s parameters at each image pixel. The experimental results demonstrate that the proposed method achieves better sharpness enhancement at edge regions, and reveals the noise reduction at smooth region.
Image interpolation requires real-time interpolating to be realized in an embedded system. This study proposes an approach to implement an APNN based on FPGA to interpolate images. The APNN layers were designed with fixed-point arithmetic-employing, synthesizable, VHDL code for FPGA implementation. The FPGA-based APNN was taken as an accelerator of embedded processor, which can be an effective computation module for APNN image interpolation. Both software-based and FPGA-based image interpolation were implemented and evaluated using an APNN. Experimental results showed that the FPGA implementation was approximately 158 times faster than that of the embedded processor with lower loss quality.
Pipeline architecture is used in video scaler to increase the throughput. The lookup table method is used to replace single neuron in estimation of smoothing parameter to improve the speed of operation. To support the many possibilities of input and output configurations, the video scaler with separate clock domains using asynchronous FIFO buffer. For the FPGA, the clock frequency report showed the APNN interpolation output maximum frequency is 79.64MHz. The critical frequency is 76.96MHz for the modules produce the inputs of APNN. While input and output frequency are at 62.21 MHz, the max input and output rectangle size is 1920x1080 to produces video at 30 frames per second (FPS).
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author2 |
Ching-Han Chen |
author_facet |
Ching-Han Chen Chia-ming Kuo 郭家銘 |
author |
Chia-ming Kuo 郭家銘 |
spellingShingle |
Chia-ming Kuo 郭家銘 Anisotropic Probabilistic Neural Network for Image Interpolation and Video Scaling |
author_sort |
Chia-ming Kuo |
title |
Anisotropic Probabilistic Neural Network for Image Interpolation and Video Scaling |
title_short |
Anisotropic Probabilistic Neural Network for Image Interpolation and Video Scaling |
title_full |
Anisotropic Probabilistic Neural Network for Image Interpolation and Video Scaling |
title_fullStr |
Anisotropic Probabilistic Neural Network for Image Interpolation and Video Scaling |
title_full_unstemmed |
Anisotropic Probabilistic Neural Network for Image Interpolation and Video Scaling |
title_sort |
anisotropic probabilistic neural network for image interpolation and video scaling |
publishDate |
2013 |
url |
http://ndltd.ncl.edu.tw/handle/36807334134851465257 |
work_keys_str_mv |
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