Design of Content-Addressable Memories Using FinFET Devices and Combining Power-Gating with Segmented Match-Line Techniques

碩士 === 國立彰化師範大學 === 電子工程學系 === 102 === Content-addressable memory (CAM) compares input search data in parallel against a table of stored data, and returns the address of the matching data. CAMs can be used in a wide variety of applications requiring high-speed parallel search. These applications inc...

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Main Authors: Kai-Lun He, 何凱倫
Other Authors: Meng-Chou Chang
Format: Others
Language:zh-TW
Published: 2014
Online Access:http://ndltd.ncl.edu.tw/handle/52583852406035935999
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spelling ndltd-TW-102NCUE54280292015-10-14T00:23:46Z http://ndltd.ncl.edu.tw/handle/52583852406035935999 Design of Content-Addressable Memories Using FinFET Devices and Combining Power-Gating with Segmented Match-Line Techniques 使用FinFET元件並結合電源閘控及匹配線分段技術的內容可定址記憶體之設計 Kai-Lun He 何凱倫 碩士 國立彰化師範大學 電子工程學系 102 Content-addressable memory (CAM) compares input search data in parallel against a table of stored data, and returns the address of the matching data. CAMs can be used in a wide variety of applications requiring high-speed parallel search. These applications include pattern recognition, data compression, and network address translation. As the feature size continues to shrink and the corresponding transistor density increases, the planar MOSFET suffer from the increased subthershold and gate leakage currents. FinFET is considered as one of the best substitutes for planar MOSFET technology in the sub-32 nm regime. This thesis is organized as three parts. In the first part of this thesis, we employed FinFET to design six FinFET TCAM cells, and we found that Config-LPSG1 TCAM cell is the best configuration. Compared with the base TCAM cell, Config-LPSG1 can reduce the power dissipation of the TCAM by 35%, and improve the energy-delay product by 30%. In the second part of this thesis, we present two novel dynamically power-gated FinFET TCAM cells, called DPG-17T and DPG-16T, which can reduce the static power dissipation of the TCAM cells storing a“don’t care”bit. Moreover, the discharge path of the match-line in DPG-17T/ DPG-16T can be constructed with only one FinFET instead of two FinFETs, greatly boosting the search speed. Simulation results have shown that using DPG-17T/DPG-16T can reduce the average power by 29.8%/31.7% and improve the energy-delay product by 66.6%/67.4%. In the third part of this thesis, we combined power-gating with segmented match-line techniques to design the FinFET TCAM cells. In this scheme, a match-line is divided into many segments, and a transmission gate is placed between two adjacent segments to control whether the two adjacent segments are connected or disconnected. The mask bits of a stored CAM word dynamically control the operation of transmission gates on the associated match-line, and thus the number of match-line segments involved in precharge/discharge is dynamically determined by the prefix length of the stored CAM word. The shorter the prefix length is, the smaller number of segments involves in precharge/discharge, and the less power dissipates. Simulation results have shown that Config-LPSG1/DPG-17T/DPG-16T combining segmented match-line techniques can effectively reduce the average power and improve the energy-delay product. Meng-Chou Chang 張孟洲 2014 學位論文 ; thesis 76 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 國立彰化師範大學 === 電子工程學系 === 102 === Content-addressable memory (CAM) compares input search data in parallel against a table of stored data, and returns the address of the matching data. CAMs can be used in a wide variety of applications requiring high-speed parallel search. These applications include pattern recognition, data compression, and network address translation. As the feature size continues to shrink and the corresponding transistor density increases, the planar MOSFET suffer from the increased subthershold and gate leakage currents. FinFET is considered as one of the best substitutes for planar MOSFET technology in the sub-32 nm regime. This thesis is organized as three parts. In the first part of this thesis, we employed FinFET to design six FinFET TCAM cells, and we found that Config-LPSG1 TCAM cell is the best configuration. Compared with the base TCAM cell, Config-LPSG1 can reduce the power dissipation of the TCAM by 35%, and improve the energy-delay product by 30%. In the second part of this thesis, we present two novel dynamically power-gated FinFET TCAM cells, called DPG-17T and DPG-16T, which can reduce the static power dissipation of the TCAM cells storing a“don’t care”bit. Moreover, the discharge path of the match-line in DPG-17T/ DPG-16T can be constructed with only one FinFET instead of two FinFETs, greatly boosting the search speed. Simulation results have shown that using DPG-17T/DPG-16T can reduce the average power by 29.8%/31.7% and improve the energy-delay product by 66.6%/67.4%. In the third part of this thesis, we combined power-gating with segmented match-line techniques to design the FinFET TCAM cells. In this scheme, a match-line is divided into many segments, and a transmission gate is placed between two adjacent segments to control whether the two adjacent segments are connected or disconnected. The mask bits of a stored CAM word dynamically control the operation of transmission gates on the associated match-line, and thus the number of match-line segments involved in precharge/discharge is dynamically determined by the prefix length of the stored CAM word. The shorter the prefix length is, the smaller number of segments involves in precharge/discharge, and the less power dissipates. Simulation results have shown that Config-LPSG1/DPG-17T/DPG-16T combining segmented match-line techniques can effectively reduce the average power and improve the energy-delay product.
author2 Meng-Chou Chang
author_facet Meng-Chou Chang
Kai-Lun He
何凱倫
author Kai-Lun He
何凱倫
spellingShingle Kai-Lun He
何凱倫
Design of Content-Addressable Memories Using FinFET Devices and Combining Power-Gating with Segmented Match-Line Techniques
author_sort Kai-Lun He
title Design of Content-Addressable Memories Using FinFET Devices and Combining Power-Gating with Segmented Match-Line Techniques
title_short Design of Content-Addressable Memories Using FinFET Devices and Combining Power-Gating with Segmented Match-Line Techniques
title_full Design of Content-Addressable Memories Using FinFET Devices and Combining Power-Gating with Segmented Match-Line Techniques
title_fullStr Design of Content-Addressable Memories Using FinFET Devices and Combining Power-Gating with Segmented Match-Line Techniques
title_full_unstemmed Design of Content-Addressable Memories Using FinFET Devices and Combining Power-Gating with Segmented Match-Line Techniques
title_sort design of content-addressable memories using finfet devices and combining power-gating with segmented match-line techniques
publishDate 2014
url http://ndltd.ncl.edu.tw/handle/52583852406035935999
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