A Single-ended-to-Differential Low Noise Amplifier for Ultra Wideband Applications

• Main Authors: Li-Wei Chen, 陳立惟
• Other Authors: Ro-Min Weng
• Format: Others
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/mj9265

碩士 === 國立東華大學 === 電機工程學系 === 102 === The research and implementation of single-to-differential low noise amplifiers (LNAs) for ultra-wideband (UWB) applications are presented in this thesis. The first chip is a single-to-differential LNA with low noise figure. The input wide-band matching is achieved by using LC matching network as a broadband matching. In order to reduce the noise figure, the first stage uses an inverter to enhance transconductance for suppressing noise. The second stage combines a common source amplifier and a common gate amplifier. The single-ended input signal can be converted to a differential-ended circuit. The third stage uses a differential buffer to increase the gain and to suppress the noise figure. The second LNA is a current re-used single-to-differential architecture. The input stage uses a common gate amplifier to achieve ultra-wideband operation. The second stage obtains current-reused structure to reduce the power consumptions. The third stage uses a capacitance compensation single-ended to a differential signal double-ended output. The proposed LNAs were simulated and fabrication by using tsmc standard 0.18m CMOS process technology which is provided by Chip Implementation Center of the National Applied Research Laboratory. The simulation results show that the proposed single-to-differential LNA can be operated from 3.1to 5GHz for lower band in UWB systems. The voltage gain is 12.68~15.75 dB. The noise figure is among 2.9~3.26 dB. The supply voltage is 1.3V. The power consumption is 20.85 mW. The phase error is less than 2.3 degrees. The gain error is less than 0.5 dB. The experimental results show that this LNA has achieved characteristics of low noise figure and conversion of a single-ended input port to differential output ports. The second LNA is an ultra-wideband current re-used single-to-differential architecture which can be operated from 3.1 to 10.6GHz for UWB systems. the simulation results are obtained by the same CMOS process as the first LNA. The voltage gain is 14.23~11.42 dB. The noise figure is among 2.91~4.41 dB. The supply voltage is 1.2V. The power consumption is 24.7 mW. The phase error is less than 2.7 degrees. The gain error is less than 0.3 dB. The experimental results show that this LNA has achieved characteristics of full-band operation under low noise figure.