SoC Integration and Verification of an AXI-Based 3D Graphics OpenGL ES2.0 SoC

碩士 === 國立中山大學 === 資訊工程學系研究所 === 102 === Nowadays, due to improvement of fabrication and IP design technology, the design complexity of System on Chip is increasing very fast. Thus we need huge amount of test pattern to verify the SOC, so how to verify the system effectively is very important. In thi...

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Bibliographic Details
Main Authors:	Cheng-Ta Wu, 吳政達
Other Authors:	Ing-Jer Huang
Format:	Others
Language:	zh-TW
Published:	2013
Online Access:	http://ndltd.ncl.edu.tw/handle/13530876256639054468

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spelling	ndltd-TW-102NSYS53920052017-03-22T04:42:37Z http://ndltd.ncl.edu.tw/handle/13530876256639054468 SoC Integration and Verification of an AXI-Based 3D Graphics OpenGL ES2.0 SoC OpenGL ES2.0 三維圖形加速系統晶片與AXI系統匯流排之整合及驗證方法 Cheng-Ta Wu 吳政達碩士國立中山大學資訊工程學系研究所 102 Nowadays, due to improvement of fabrication and IP design technology, the design complexity of System on Chip is increasing very fast. Thus we need huge amount of test pattern to verify the SOC, so how to verify the system effectively is very important. In this thesis, we take the 3DG OpenGL ES2.0 SoC which was developed by our 3DG design group as example, introducing how to build a verification platform with unified method through each level from System Modeling Level to FPGA Emulation Level. Furthermore, we use the automatic verification mechanism to improve the effectiveness of the test pattern and correctness of comparison results. And in order to improve the performance of 3DG OpenGL ES2.0 SoC, we change the original adopted AHB system bus into high performance AXI system bus. We use coreConsultant (developed by Synopsys) to generate the related IP modules, so we can save development and verification time of modules under AXI environment, and we will also introduce the flow of IP generation and synthesis in this thesis. Ing-Jer Huang 黃英哲 2013 學位論文 ; thesis 173 zh-TW
collection	NDLTD
language	zh-TW
format	Others
sources	NDLTD
description	碩士 === 國立中山大學 === 資訊工程學系研究所 === 102 === Nowadays, due to improvement of fabrication and IP design technology, the design complexity of System on Chip is increasing very fast. Thus we need huge amount of test pattern to verify the SOC, so how to verify the system effectively is very important. In this thesis, we take the 3DG OpenGL ES2.0 SoC which was developed by our 3DG design group as example, introducing how to build a verification platform with unified method through each level from System Modeling Level to FPGA Emulation Level. Furthermore, we use the automatic verification mechanism to improve the effectiveness of the test pattern and correctness of comparison results. And in order to improve the performance of 3DG OpenGL ES2.0 SoC, we change the original adopted AHB system bus into high performance AXI system bus. We use coreConsultant (developed by Synopsys) to generate the related IP modules, so we can save development and verification time of modules under AXI environment, and we will also introduce the flow of IP generation and synthesis in this thesis.
author2	Ing-Jer Huang
author_facet	Ing-Jer Huang Cheng-Ta Wu 吳政達
author	Cheng-Ta Wu 吳政達
spellingShingle	Cheng-Ta Wu 吳政達 SoC Integration and Verification of an AXI-Based 3D Graphics OpenGL ES2.0 SoC
author_sort	Cheng-Ta Wu
title	SoC Integration and Verification of an AXI-Based 3D Graphics OpenGL ES2.0 SoC
title_short	SoC Integration and Verification of an AXI-Based 3D Graphics OpenGL ES2.0 SoC
title_full	SoC Integration and Verification of an AXI-Based 3D Graphics OpenGL ES2.0 SoC
title_fullStr	SoC Integration and Verification of an AXI-Based 3D Graphics OpenGL ES2.0 SoC
title_full_unstemmed	SoC Integration and Verification of an AXI-Based 3D Graphics OpenGL ES2.0 SoC
title_sort	soc integration and verification of an axi-based 3d graphics opengl es2.0 soc
publishDate	2013
url	http://ndltd.ncl.edu.tw/handle/13530876256639054468
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SoC Integration and Verification of an AXI-Based 3D Graphics OpenGL ES2.0 SoC

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