| Summary: | 碩士 === 國立中山大學 === 電機工程學系研究所 === 102 === Due to the increasing percentages of traffic accidents in our society, many automobile manufacturers devote to develop various automotive anti-collision radar warning systems. Utilizing these radar warning systems, drivers can make some responses for preventing accident occurring within few seconds. However, for the automotive collision avoidance radar receivers, low-noise amplifiers must have the abilities of highly stable and amplify the signal to ensure the messages are shown perfectly and accurately, which give motorists attentions of traffic accident. To achieve the above characteristics, the traditional low-noise amplifiers consume greater power to meet the high-gain and stable functions. Therefore, this thesis employs the TSMC 0.18 μm CMOS process to develop low-noise amplifiers designs with both high gain and low power consumption which can be implemented in automotive anti-collision radars.
This thesis utilizes dual stage to simplify complexity of the circuit without sacrificing the power consumption. In order to effectively increase the gain and stability, the proposed low-noise amplifiers comprises a negative resistance of a gm-boosted technology, the concept of zero-pole point, the paralleled RC structure, a source follower buffer and a source-degeneration structure employed into the input stage improving input matching.
The proposed low noise amplifier with 1.4 mm × 0.7 mm chip size and its 24 GHz operating frequency is well suited for automotive radar (22-29 GHz) application. This low noise amplifier shows a very high-gain of 21.2 dB. Moreover, the amplifier presemts input return loss of -18.1 dB, very good output return loss of -28.1 dB and excellent isolation of -65.6 dB. Finally, a moderate consuming power are 15.8 mW of low noise amplifier from 1.5 V supply voltage.
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