| Summary: | 碩士 === 國立清華大學 === 資訊工程學系 === 102 === Nowadays, Graphic Processing Unit (GPU) is becoming a significant computing device due to powerful computing ability which consists of enormous computing threads and the SIMT architecture. However, the more powerful computing ability comes with more power consumption.
In this thesis, to reduce energy consumption while GPGPU program executes on GPU, we study in new GPU architecture with hierarchical register files and propose two kinds of power-saving register allocation schemes to allocate values to appropriate register files in LLVM (Low-Level Virtual Machine) compilation framework.
Furthermore, in order to gain more energy saving and enhance utilization ratio of energy-efficient register files, we also present our density-aware live range splitting mechanism with cost model into our hierarchical register allocation schemes. We choose live ranges with high energy saving but fail to assign register to do live range splitting for full utilizing energy-efficient register files.
The experiment result shows register accessing ratio of each register file read/write access between our hierarchical register allocation schemes. The energy consumption decrease at most 51.07\%, and improve about 17\% of energy-efficient registers utilization by single-pass register allocation scheme with density-aware live range splitting mechanism.
|
|---|
