Interface Engineering for the Enhancement of Graphene Transistor Properties using Self-assembled Monolayer

碩士 === 國立清華大學 === 電子工程研究所 === 102 === CVD graphene is the main way to apply graphene in semiconductor engineering, because of it can be mass production. However, CVD graphene can't avoid the graphene transfer process, it would be polluted very easily and limited the graphene carrier transport p...

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Bibliographic Details
Main Authors: Hsiao, She-Hsin, 蕭碩信
Other Authors: Chiu, Po-Wen
Format: Others
Language:zh-TW
Published: 2014
Online Access:http://ndltd.ncl.edu.tw/handle/18033617162826328711
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Summary:碩士 === 國立清華大學 === 電子工程研究所 === 102 === CVD graphene is the main way to apply graphene in semiconductor engineering, because of it can be mass production. However, CVD graphene can't avoid the graphene transfer process, it would be polluted very easily and limited the graphene carrier transport properties. The main point of this thesis is to analyze the CVD graphene carrier transport mechanism, find out the carrier transport scattering source and the cause of the transistor hysteresis effect, to build a model fit to analyze the CVD graphene transport. We also try to create a transistor fabrication method to enhance CVD graphene carrier transport properties, using HMDS(Hexamethyldisilazane) self-assembled process to modify the surface property of SiO2, to solve the problem that SiO2 easily adsorbs impurity, and therefore affecting the graphene transport properties. According to the experiment result, HMDS surface modification process can effectively prevents impurity adsorbs on to SiO2 surface and provides graphene a more clean substrate environment, reduces the graphene residual carrier concentration. However, this process can't suppresses CVD graphene transistor hysteresis effect. In order to enhance graphene transistor properties, we should modify the substrate surface property and improve the cleanliness of the transfer process at the same time.