Self-Convergent Trimming of Embedded Logic Compatible OTP memory in Low Voltage SRAMs

• Main Author: 簡聖諺
• Other Authors: 林崇榮
• Format: Others
• Language: zh-TW
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/70518631274482928744

碩士 === 國立清華大學 === 電子工程研究所 === 102 === SRAM (Static Random Access Memory) is a dominating at type of volatile memory, widely used in CPU registers, CPU caches, and various kinds of buffers with the characteristics of fast read/write access time and infinite read/write endurance. Because SRAM is a pure logic circuitry composed of cross-coupled inverters, it is embedded in logic CMOS process to further reduce the cost in packaging. As process technology scales, threshold voltage of the transistors in SRAM cells must decreases for the need of supply voltage scaling while variation of threshold voltage increases as a result of dopant fluctuation and size fluctuation in minimization of critical dimensions. These fluctuations must be minimized or some soft errors might happen to cause read/write mistakes when operates. In this work, we introduce a new logic compatible OTP (One-Time Programmable) Memory made up of SAN (Self-Aligned Nitride) structure to combine with SRAM cells. Through blanket programming operation and self-convergent characteristics of the OTP cell, process variations can be effectively suppressed in the new SRAM to improve SNM (Static-Noise Margin). The read failure rate due to static noise can be reduced. Therefore, the variation caused by process can be solved by blanket trimming operations.