Analysis and Design of Signal Integrity for DDR3 Memory System on Two-Layer PCB
碩士 === 國立臺灣大學 === 電信工程學研究所 === 102 ===
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/44119420299021146662 |