Study and Implementation of a Cascoded Half-Bridge Series Resonant Converter with Synchronous Rectification

碩士 === 國立臺灣科技大學 === 電子工程系 === 102 === This thesis presents a cascoded half-bridge series resonant converter with synchronous rectification. The Mathcad software is used to simulate the influences of the quality factor (Q), K factor, characteristics impedance (Zo), and the transformer turns-ratio (NP...

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Main Authors: Jun-zhi Zhong, 鐘俊智
Other Authors: Yu-kang Lo
Format: Others
Language:zh-TW
Published: 2014
Online Access:http://ndltd.ncl.edu.tw/handle/90280109042394733517
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spelling ndltd-TW-102NTUS54281012016-03-09T04:30:58Z http://ndltd.ncl.edu.tw/handle/90280109042394733517 Study and Implementation of a Cascoded Half-Bridge Series Resonant Converter with Synchronous Rectification 具同步整流疊接式半橋串聯諧振轉換器研製 Jun-zhi Zhong 鐘俊智 碩士 國立臺灣科技大學 電子工程系 102 This thesis presents a cascoded half-bridge series resonant converter with synchronous rectification. The Mathcad software is used to simulate the influences of the quality factor (Q), K factor, characteristics impedance (Zo), and the transformer turns-ratio (NP/NS) on the frequency response of voltage gain. The proposed converter has the advantage of low device stress. It subjects the off transistor on primary side to only half of the input voltage. The transformers can share the output current to reduce the copper losses. The conduction losses on the output synchronous rectifier can also be reduced to improve the conversion efficiency. Circuit analysis and design consideration of the proposed cascoded half-bridge series resonant converter with synchronous rectification are discussed in details. The prototype converter with an input voltage 380V, output voltage 12 V and the rated output current 54.4 A was implemented and tested. The efficiency can be higher than 93 % at 20 % load to full load conditions and the voltage regulation is less than 1 %. Yu-kang Lo Huang-jen Chiu 羅有綱 邱煌仁 2014 學位論文 ; thesis 104 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 國立臺灣科技大學 === 電子工程系 === 102 === This thesis presents a cascoded half-bridge series resonant converter with synchronous rectification. The Mathcad software is used to simulate the influences of the quality factor (Q), K factor, characteristics impedance (Zo), and the transformer turns-ratio (NP/NS) on the frequency response of voltage gain. The proposed converter has the advantage of low device stress. It subjects the off transistor on primary side to only half of the input voltage. The transformers can share the output current to reduce the copper losses. The conduction losses on the output synchronous rectifier can also be reduced to improve the conversion efficiency. Circuit analysis and design consideration of the proposed cascoded half-bridge series resonant converter with synchronous rectification are discussed in details. The prototype converter with an input voltage 380V, output voltage 12 V and the rated output current 54.4 A was implemented and tested. The efficiency can be higher than 93 % at 20 % load to full load conditions and the voltage regulation is less than 1 %.
author2 Yu-kang Lo
author_facet Yu-kang Lo
Jun-zhi Zhong
鐘俊智
author Jun-zhi Zhong
鐘俊智
spellingShingle Jun-zhi Zhong
鐘俊智
Study and Implementation of a Cascoded Half-Bridge Series Resonant Converter with Synchronous Rectification
author_sort Jun-zhi Zhong
title Study and Implementation of a Cascoded Half-Bridge Series Resonant Converter with Synchronous Rectification
title_short Study and Implementation of a Cascoded Half-Bridge Series Resonant Converter with Synchronous Rectification
title_full Study and Implementation of a Cascoded Half-Bridge Series Resonant Converter with Synchronous Rectification
title_fullStr Study and Implementation of a Cascoded Half-Bridge Series Resonant Converter with Synchronous Rectification
title_full_unstemmed Study and Implementation of a Cascoded Half-Bridge Series Resonant Converter with Synchronous Rectification
title_sort study and implementation of a cascoded half-bridge series resonant converter with synchronous rectification
publishDate 2014
url http://ndltd.ncl.edu.tw/handle/90280109042394733517
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