Design and Research of Switched-Capacitor Delta-Sigma Modulator for Buck Converter Applications

• Main Authors: Yuan-Yu Peng, 彭元佑
• Other Authors: Jiann-Jong Chen
• Format: Others
• Language: zh-TW
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/jkw2qp

碩士 === 國立臺北科技大學 === 電資碩士在職專班研究所 === 102 === In recent years, with the rapid development and innovation of the portable products become increasingly rigorous are not only the development of portable products, but also the popularization of home-used human body bio-sensing equipment and the dependence of human. Nevertheless, for the portable products, each design relies on the consideration of the product development always tending to high-efficiency and low-cost standard. Analog-to-Digital Converters (ADCs) play an important role as the band with analog and digital circuit. Power consumption as one of the significant factors is requested lower and lower, so lower power has become a hot topic. This thesis presents the design and research of buck converter whose control circuit architecture uses discrete-time second-order one-bit Delta-Sigma modulator. The architecture is base on the concept of current mode operation, which using synchronous rectification to reduce the power loss and improve the total efficiency. Over-sampling and Delta-Sigma modulation techniques have advantages in low bandwidth and high resolution, and it can effectively reduce the noise level of the converter output. By using simplified switched-capacitor integrator architecture, the proposed circuit achieves high efficiency and low-power. The simulated results show the noise level less than -75dB and efficiency which output voltage is 2.8V achieves 95% with a load current up to 250mA.