Analysis and Implementation of a Zero-Voltage-Switching DC-DC Converter with Interleaved PWM Operation
碩士 === 崑山科技大學 === 電機工程研究所 === 103 === A zero-voltage-switching (ZVS) DC-DC converter with interleaved PWM operation is proposed in this thesis. The converter configuration is modified and composed of two asymmetrical half-bridge converter cells with series-connected on the input side and parallel-co...
Main Authors: | , |
---|---|
Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2015
|
Online Access: | http://ndltd.ncl.edu.tw/handle/26pf9b |
id |
ndltd-TW-103KSUT0442042 |
---|---|
record_format |
oai_dc |
spelling |
ndltd-TW-103KSUT04420422019-06-27T05:24:47Z http://ndltd.ncl.edu.tw/handle/26pf9b Analysis and Implementation of a Zero-Voltage-Switching DC-DC Converter with Interleaved PWM Operation 具交錯式PWM操作之零電壓切換DC-DC轉換器分析與研製 Kai-Ren Lin 林凱仁 碩士 崑山科技大學 電機工程研究所 103 A zero-voltage-switching (ZVS) DC-DC converter with interleaved PWM operation is proposed in this thesis. The converter configuration is modified and composed of two asymmetrical half-bridge converter cells with series-connected on the input side and parallel-connected on the output side. The two power switches are driven by the complementary and asymmetrical PWM signals. The main characteristics of the new converter are as follows. The series input architecture can achieve input voltage sharing to reduce the voltage stresses of power switches. The parallel output architecture can achieve output current sharing to distribute power losses and thermal stresses of the transformers and semiconductors. All the power switches can achieve ZVS turn-on to reduce the switching losses by using the resonant circuit composed of the output capacitances of power switches and the resonant inductor. Accordingly, it can improve the conversion efficiency. The interleaved PWM operation can result in the output inductor current ripple cancellation such that the current ripple in the output capacitor is reduced. As a result, the size of output inductors and capacitor can be reduced and the power density is increased. All these features make the proposed converter suitable for high input voltage, high output current and high efficiency applications. The operating principles and design considerations of the converter are proposed. The simulation software IsSpice is utilized for verification. In addition, a driving circuit and a regulation controller are designed to diminish the effect of the variations of input voltage and load on the output voltage. Finally, a experimental prototype with 400 V input and 48 V output operating at a switching frequency 100 kHz is built. The measured maximal efficiency is 88.83%. The experimental results are presented to verify the theoretical analysis. Shin-Ju Chen Sung-Pei Yang 陳信助 楊松霈 2015 學位論文 ; thesis 93 zh-TW |
collection |
NDLTD |
language |
zh-TW |
format |
Others
|
sources |
NDLTD |
description |
碩士 === 崑山科技大學 === 電機工程研究所 === 103 === A zero-voltage-switching (ZVS) DC-DC converter with interleaved PWM operation is proposed in this thesis. The converter configuration is modified and composed of two asymmetrical half-bridge converter cells with series-connected on the input side and parallel-connected on the output side. The two power switches are driven by the complementary and asymmetrical PWM signals.
The main characteristics of the new converter are as follows. The series input architecture can achieve input voltage sharing to reduce the voltage stresses of power switches. The parallel output architecture can achieve output current sharing to distribute power losses and thermal stresses of the transformers and semiconductors. All the power switches can achieve ZVS turn-on to reduce the switching losses by using the resonant circuit composed of the output capacitances of power switches and the resonant inductor. Accordingly, it can improve the conversion efficiency. The interleaved PWM operation can result in the output inductor current ripple cancellation such that the current ripple in the output capacitor is reduced. As a result, the size of output inductors and capacitor can be reduced and the power density is increased. All these features make the proposed converter suitable for high input voltage, high output current and high efficiency applications.
The operating principles and design considerations of the converter are proposed. The simulation software IsSpice is utilized for verification. In addition, a driving circuit and a regulation controller are designed to diminish the effect of the variations of input voltage and load on the output voltage. Finally, a experimental prototype with 400 V input and 48 V output operating at a switching frequency 100 kHz is built. The measured maximal efficiency is 88.83%. The experimental results are presented to verify the theoretical analysis.
|
author2 |
Shin-Ju Chen |
author_facet |
Shin-Ju Chen Kai-Ren Lin 林凱仁 |
author |
Kai-Ren Lin 林凱仁 |
spellingShingle |
Kai-Ren Lin 林凱仁 Analysis and Implementation of a Zero-Voltage-Switching DC-DC Converter with Interleaved PWM Operation |
author_sort |
Kai-Ren Lin |
title |
Analysis and Implementation of a Zero-Voltage-Switching DC-DC Converter with Interleaved PWM Operation |
title_short |
Analysis and Implementation of a Zero-Voltage-Switching DC-DC Converter with Interleaved PWM Operation |
title_full |
Analysis and Implementation of a Zero-Voltage-Switching DC-DC Converter with Interleaved PWM Operation |
title_fullStr |
Analysis and Implementation of a Zero-Voltage-Switching DC-DC Converter with Interleaved PWM Operation |
title_full_unstemmed |
Analysis and Implementation of a Zero-Voltage-Switching DC-DC Converter with Interleaved PWM Operation |
title_sort |
analysis and implementation of a zero-voltage-switching dc-dc converter with interleaved pwm operation |
publishDate |
2015 |
url |
http://ndltd.ncl.edu.tw/handle/26pf9b |
work_keys_str_mv |
AT kairenlin analysisandimplementationofazerovoltageswitchingdcdcconverterwithinterleavedpwmoperation AT línkǎirén analysisandimplementationofazerovoltageswitchingdcdcconverterwithinterleavedpwmoperation AT kairenlin jùjiāocuòshìpwmcāozuòzhīlíngdiànyāqièhuàndcdczhuǎnhuànqìfēnxīyǔyánzhì AT línkǎirén jùjiāocuòshìpwmcāozuòzhīlíngdiànyāqièhuàndcdczhuǎnhuànqìfēnxīyǔyánzhì |
_version_ |
1719211218770591744 |