Computer Aided Symbolic Circuit Analysis Using VB.Net
博士 === 國立高雄應用科技大學 === 電子工程系碩士班 === 103 === Symbolic analysis is a very useful tool which is used to model the behavior or a characteristic of an analog circuit in voltage-, current-, and mixed-mode, and (some or all of) the circuit elements represented by symbols. The symbolic nodal analysis (NA)...
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ndltd-TW-103KUAS03930782016-08-28T04:12:11Z http://ndltd.ncl.edu.tw/handle/69829650332863087827 Computer Aided Symbolic Circuit Analysis Using VB.Net 電腦輔助符號電路分析系統 Nan-Hui Chiang 江南輝 博士 國立高雄應用科技大學 電子工程系碩士班 103 Symbolic analysis is a very useful tool which is used to model the behavior or a characteristic of an analog circuit in voltage-, current-, and mixed-mode, and (some or all of) the circuit elements represented by symbols. The symbolic nodal analysis (NA) using pathological element is very popular since we can perform symbolic analysis by only applying nodal analysis on their RLC-nullor-mirror networks. The symbolic analytical efficiency is increased owing to the lower circuit complexity of the RLC-nullor-mirror equivalents in comparison with their RLC-nullor counterparts. A systematic formulation method which directly performs symbolic analysis on the RLC-nullor-floating mirror-based models of circuits for computing small-signal characteristics is developed. The non-ideal effects of active devices can be considered in the proposed approach by using models of non-ideal active devices which can be easily constructed from their ideal models. In this dissertation, a computer aided symbolic circuit analysis system using VB.Net is designed to analyze pathological element-based circuits. The admittance matrix simplification rules are realized according to the properties of pathological elements. The system automatically simplifies nodal analysis matrix of the pathological element-based analog circuits to obtain the transfer functions. It uses the Net List which is similar to SPICE to describe the interconnection of elements. Using the nullor-floating mirror equivalences of circuits, the result of the simplified NA matrix is more compact compared to their nullor equivalents or nullor-grounded mirror equivalences. The CPU time during the solution of the NA matrix is reduced by using nullor-floating mirror equivalents. The application of the proposed technique to practical circuits is given to demonstrate its feasibility. Hung-Yu Wang 王鴻猷 2015 學位論文 ; thesis 135 en_US |
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博士 === 國立高雄應用科技大學 === 電子工程系碩士班 === 103 === Symbolic analysis is a very useful tool which is used to model the behavior or a characteristic of an analog circuit in voltage-, current-, and mixed-mode, and (some or all of) the circuit elements represented by symbols. The symbolic nodal analysis (NA) using pathological element is very popular since we can perform symbolic analysis by only applying nodal analysis on their RLC-nullor-mirror networks. The symbolic analytical efficiency is increased owing to the lower circuit complexity of the RLC-nullor-mirror equivalents in comparison with their RLC-nullor counterparts.
A systematic formulation method which directly performs symbolic analysis on the RLC-nullor-floating mirror-based models of circuits for computing small-signal characteristics is developed. The non-ideal effects of active devices can be considered in the proposed approach by using models of non-ideal active devices which can be easily constructed from their ideal models.
In this dissertation, a computer aided symbolic circuit analysis system using VB.Net is designed to analyze pathological element-based circuits. The admittance matrix simplification rules are realized according to the properties of pathological elements. The system automatically simplifies nodal analysis matrix of the pathological element-based analog circuits to obtain the transfer functions. It uses the Net List which is similar to SPICE to describe the interconnection of elements. Using the nullor-floating mirror equivalences of circuits, the result of the simplified NA matrix is more compact compared to their nullor equivalents or nullor-grounded mirror equivalences. The CPU time during the solution of the NA matrix is reduced by using nullor-floating mirror equivalents. The application of the proposed technique to practical circuits is given to demonstrate its feasibility.
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author2 |
Hung-Yu Wang |
author_facet |
Hung-Yu Wang Nan-Hui Chiang 江南輝 |
author |
Nan-Hui Chiang 江南輝 |
spellingShingle |
Nan-Hui Chiang 江南輝 Computer Aided Symbolic Circuit Analysis Using VB.Net |
author_sort |
Nan-Hui Chiang |
title |
Computer Aided Symbolic Circuit Analysis Using VB.Net |
title_short |
Computer Aided Symbolic Circuit Analysis Using VB.Net |
title_full |
Computer Aided Symbolic Circuit Analysis Using VB.Net |
title_fullStr |
Computer Aided Symbolic Circuit Analysis Using VB.Net |
title_full_unstemmed |
Computer Aided Symbolic Circuit Analysis Using VB.Net |
title_sort |
computer aided symbolic circuit analysis using vb.net |
publishDate |
2015 |
url |
http://ndltd.ncl.edu.tw/handle/69829650332863087827 |
work_keys_str_mv |
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