Hardware Implementation of Programmable Fast Algorithm for Object Detection

碩士 === 國立中興大學 === 電機工程學系所 === 103 === In this thesis, an algorithm integrated the vehicle and road sign detection is proposed. To further reduce the processing time, we proposed three different modes: full detection, partial detection and objet verification. For a series of input images, we detected...

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Bibliographic Details
Main Authors: Yen-Kang Hsu, 許宴綱
Other Authors: 吳崇賓
Format: Others
Language:zh-TW
Published: 2015
Online Access:http://ndltd.ncl.edu.tw/handle/89518245974046486867
Description
Summary:碩士 === 國立中興大學 === 電機工程學系所 === 103 === In this thesis, an algorithm integrated the vehicle and road sign detection is proposed. To further reduce the processing time, we proposed three different modes: full detection, partial detection and objet verification. For a series of input images, we detected all objects of the complete image in full detection mode. Based on the results of the previous frame, we set searching regions for detection in partial detection mode. No detection is applied in object verification that the objects are only verified based on the locations of detected objects in the previous frame. The algorithm is controlled by the programmable parameters that the detection condition can be easily changed. Overall, the proposed algorithm achieves 78% computation reduction. To reduce the influence of low luminance, we proposed Night Time Vehicle Detection (NTVD). First, the input image is binarized by the threshold of brightness. The feature point of Color Count Block (CCB) is calculated to judge the similarity of rear lights for determining whether the objects are vehicles. NTVD improves the disadvantage of original detection algorithm and increases the accuracy at night. The experimental results show the average accuracy rate of object detection can exceed about 89% in different weather. To reach the target of real-time processing, related hardware architecture is also presented for FULL HD@30fps by using algorithm design flow. Finally the proposed hardware is simulated at Zynq-7000 platform and work at 1.9 MHz to reach the real time requirement.