A Patch-matched Hole Filling Algorithm for Multiview Synthesis and Its VLSI Implementation

• Main Authors: Huan-KaiTseng, 曾桓愷
• Other Authors: Bin-Da Liu
• Format: Others
• Language: en_US
• Published: 2015
• Online Access: http://ndltd.ncl.edu.tw/handle/17751814682494348574

碩士 === 國立成功大學 === 電機工程學系 === 103 === In this thesis, a patch-matched hole filling algorithm for depth image-based rendering is proposed. Instead of traditional smoothing depth approaches, which reduce geometric distortion in virtual views, the proposed algorithm used to deal with the alignment of texture image and depth map increases the correctness of hole filling. In this algorithm, the key is to search similar patches with adaptive window size in surrounding region to fill holes. Also, considering the information of depth map insures holes will be filled with the patches in background. Compared to the methods of hole filling pixel-by-pixel and the methods of background extension, the results of the proposed algorithm will be more natural. In hardware architecture, the algorithm is implemented in Altera DE3-260 FPGA. The design of patch-matched hole filling algorithm requires 12.7 k logic elements, 10.2 k registers, and 2.39 Mb RAM. This work is supported to 1080p (1920 × 1080) video in real time at maximum operating frequency 152.47 MHz.