System Design and Phase Noise Cancellation Algorithm for Gb/s Transmission Indoor Wireless SC/OFDM Receivers

碩士 === 國立交通大學 === 電子工程學系 電子研究所 === 103 === In order to deal with the phase noise caused by the RF device which are required for 60GHz communication system might degrade the system performance. This thesis proposes a dual mode, low complexity and also achieves the specifications of the IEEE 802.15.3c...

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Main Authors: Huang, Liang-Yu, 黃亮瑜
Other Authors: Jou, Shyh-Jye
Format: Others
Language:en_US
Published: 2014
Online Access:http://ndltd.ncl.edu.tw/handle/25kc33
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spelling ndltd-TW-103NCTU54281052019-05-15T22:33:36Z http://ndltd.ncl.edu.tw/handle/25kc33 System Design and Phase Noise Cancellation Algorithm for Gb/s Transmission Indoor Wireless SC/OFDM Receivers 十億級資料傳輸室內無線 SC/OFDM 接收器之系統架構設計與相位雜訊消除演算法及設計 Huang, Liang-Yu 黃亮瑜 碩士 國立交通大學 電子工程學系 電子研究所 103 In order to deal with the phase noise caused by the RF device which are required for 60GHz communication system might degrade the system performance. This thesis proposes a dual mode, low complexity and also achieves the specifications of the IEEE 802.15.3c standard phase noise cancellation (PNC) algorithm and hardware design. Meanwhile, its low complexity allows the implementation of baseband receiver. While in OFDM mode, a frequency domain algorithm for common phase error (CPE) cancellation and a feedback loop for long term residual carrier frequency offset tracking is provided in baseband receiver. As for SC mode, a two-stage phase noise cancellation algorithm is proposed and 99.8% of the hardware can be shared with the frequency domain algorithm for HSI mode. Besides, this thesis improves a single carrier (SC) mode and orthogonal frequency division multiplexing (OFDM) mode dual mode wireless receiver which is designed and implemented for IEEE 802.15.3c standard. There are five main functional blocks in the baseband receiver, which are boundary detection, sampling clock offset (SCO) cancellation, carrier frequency offset (CFO) cancellation, frequency domain equalizer, and phase noise cancellation. The hardware of key module between SC/OFDM modes are shared to reduce the hardware cost and power consumption. The baseband receiver works at 500MHz with 8X-parallelism architecture. The data rate can achieve 16 Gb/s and 24 Gb/s in SC mode and HSI mode, respectively. The area is 203 K gate count and the power is 297 mW. In NLOS channel, the un-coded BER at SNR 12dB can achieve 3.09×〖10〗^(-5) and 1.21×〖10〗^(-3)in SC mode and HSI mode, respectively. Jou, Shyh-Jye 周世傑 2014 學位論文 ; thesis 60 en_US
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language en_US
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description 碩士 === 國立交通大學 === 電子工程學系 電子研究所 === 103 === In order to deal with the phase noise caused by the RF device which are required for 60GHz communication system might degrade the system performance. This thesis proposes a dual mode, low complexity and also achieves the specifications of the IEEE 802.15.3c standard phase noise cancellation (PNC) algorithm and hardware design. Meanwhile, its low complexity allows the implementation of baseband receiver. While in OFDM mode, a frequency domain algorithm for common phase error (CPE) cancellation and a feedback loop for long term residual carrier frequency offset tracking is provided in baseband receiver. As for SC mode, a two-stage phase noise cancellation algorithm is proposed and 99.8% of the hardware can be shared with the frequency domain algorithm for HSI mode. Besides, this thesis improves a single carrier (SC) mode and orthogonal frequency division multiplexing (OFDM) mode dual mode wireless receiver which is designed and implemented for IEEE 802.15.3c standard. There are five main functional blocks in the baseband receiver, which are boundary detection, sampling clock offset (SCO) cancellation, carrier frequency offset (CFO) cancellation, frequency domain equalizer, and phase noise cancellation. The hardware of key module between SC/OFDM modes are shared to reduce the hardware cost and power consumption. The baseband receiver works at 500MHz with 8X-parallelism architecture. The data rate can achieve 16 Gb/s and 24 Gb/s in SC mode and HSI mode, respectively. The area is 203 K gate count and the power is 297 mW. In NLOS channel, the un-coded BER at SNR 12dB can achieve 3.09×〖10〗^(-5) and 1.21×〖10〗^(-3)in SC mode and HSI mode, respectively.
author2 Jou, Shyh-Jye
author_facet Jou, Shyh-Jye
Huang, Liang-Yu
黃亮瑜
author Huang, Liang-Yu
黃亮瑜
spellingShingle Huang, Liang-Yu
黃亮瑜
System Design and Phase Noise Cancellation Algorithm for Gb/s Transmission Indoor Wireless SC/OFDM Receivers
author_sort Huang, Liang-Yu
title System Design and Phase Noise Cancellation Algorithm for Gb/s Transmission Indoor Wireless SC/OFDM Receivers
title_short System Design and Phase Noise Cancellation Algorithm for Gb/s Transmission Indoor Wireless SC/OFDM Receivers
title_full System Design and Phase Noise Cancellation Algorithm for Gb/s Transmission Indoor Wireless SC/OFDM Receivers
title_fullStr System Design and Phase Noise Cancellation Algorithm for Gb/s Transmission Indoor Wireless SC/OFDM Receivers
title_full_unstemmed System Design and Phase Noise Cancellation Algorithm for Gb/s Transmission Indoor Wireless SC/OFDM Receivers
title_sort system design and phase noise cancellation algorithm for gb/s transmission indoor wireless sc/ofdm receivers
publishDate 2014
url http://ndltd.ncl.edu.tw/handle/25kc33
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