Size Optimization of Silicon Schottky Diode and SiGe BiCMOS 5/60GHz Receiver Using 60GHz Schottky Diode Sub-Harmonic Mixer

• Main Authors: Chiu, Jhih-Huei, 邱智揮
• Other Authors: Meng ,Chinchun
• Format: Others
• Language: zh-TW
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/40288112836819748508

碩士 === 國立交通大學 === 電信工程研究所 === 103 === This thesis consists of two parts. The first part analyzes Schottky diodes in CMOS and SiGe BiCMOS. The second part is a SiGe BiCMOS 5/60 GHz receiver. In Chapter 2, Silicon Schottky diodes are fabricated in the TSMC CMOS and SiGe BiCMOS 0.18μm process. The extractions of junction capacitance, series resistance and cut-off frequency are demonstrated in this thesis. The effect of different layout would be discussed in this chapter. Chapter 3 describes a 5/60 GHz receiver constructed of a 60-GHz dual-conversion down-converter and a 5-GHz direct-conversion receiver in 0.18 m SiGe BiCMOS. The 60GHz dual-conversion down-converter consists of a SiGe Schottky diode sub-harmonic mixer with a minimized rat-race coupler. On the other hand, the high-Q RF channel-select bandpass filter is employed in the 5GHz direct-conversion receiver to obtain narrow IF bandwidth. Moreover, both 5GHz and 60GHz receivers are connected to same switchable IF2 Gilbert mixer.