Implicit Connection Graph Maze Routing for Layout Migration

• Main Authors: Lin, Ting Chun, 林鼎鈞
• Other Authors: Mak, Wai Kei
• Format: Others
• Language: en_US
• Published: 2015
• Online Access: http://ndltd.ncl.edu.tw/handle/49609235325364201357

碩士 === 國立清華大學 === 資訊工程學系 === 103 === With advanced Very-Large-Scale Integration (VLSI) technology, migration method is more important in analog circuit or some special custom design. Sometimes two blocks in circuit will be migrated with different scale factor, and result in some connection between two blocks broken. To solve the problem described before, we propose a scanline base break point detection method that can construct the connection between polygons efficient. After compare the connection between non-sizing and sizing, we can obtain all break point what we need to route. To route the break point, an implicit connection graph base maze router is proposed, it can fully use the routing resource and get a small bend solution. As the result, our router use in layout migration method has a DRC clean solution in a real case. ii