Simulation of Through Silicon Via and Self-heating Effects on Advanced Devices

碩士 === 國立臺灣大學 === 光電工程學研究所 === 103 === Moore’s Law is the main driving force in the semiconductor industry, the number of transistors in the integrated circuit has doubled almost every two years. However, it is becoming more challenging for the semiconductor manufacturing technology to follow th...

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Main Authors: Yi-Chung Huang, 黃奕中
Other Authors: Chee Wee Liu
Format: Others
Language:en_US
Published: 2015
Online Access:http://ndltd.ncl.edu.tw/handle/97006676992965109035
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spelling ndltd-TW-103NTU051240482016-11-19T04:09:47Z http://ndltd.ncl.edu.tw/handle/97006676992965109035 Simulation of Through Silicon Via and Self-heating Effects on Advanced Devices 矽穿孔及先進元件自發熱效應之模擬分析 Yi-Chung Huang 黃奕中 碩士 國立臺灣大學 光電工程學研究所 103 Moore’s Law is the main driving force in the semiconductor industry, the number of transistors in the integrated circuit has doubled almost every two years. However, it is becoming more challenging for the semiconductor manufacturing technology to follow the trend as in the past. While the conventional MOSFETs face the scaling limits, 3D transistors such as FinFETs improve the transistor feature size and performance over planar MOSFETs to continue the scaling trend. However, the increasing device density, materials with poor thermal conductivity and the physical confinement of the device geometries are responsible for the increased the self-heating effects in ultra-scaled transistors. Instead of the reduction of the transistor size, 3D IC has also been demonstrated as a feasible technology. While traditional methods of interconnect such as wire bonding need long cross-chip interconnects, 3D ICs achieve shorter interconnect architectures by stacking one die on top of another dies. 3D packaging technology offer an alternative that not only improve the overall transmission speed and reduce the power consumption, but also increase the functionality of ICs at a smaller footprint. In this way, it extends the semiconductor scaling limits beyond the roadmap predicted by Moore''s. Law, and TSV is one of these key technologies as an effective solution. The content of the thesis can be divided into two major parts. First, we discuss about the effect of thermo-mechanical stress induced by TSV structures. We simulated the thermo-mechanical stresses near the surface of Si substrate and investigate its impacts on the performance of the nearby electronic devices. With the experimental results and numerical calibrations, we present a keep out zone model. Second, the self-heating effects on advanced devices and the heat dissipation have been investigated. Self-heating effects can not only degrade device performance but also accelerate degradation mechanism, and all these problems may increase the difficulty in IC designing. Therefore, the thermal issue becomes very important and needs to be solved and we are trying to study the self-heating effects on advanced devices. Chee Wee Liu 劉致為 2015 學位論文 ; thesis 67 en_US
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description 碩士 === 國立臺灣大學 === 光電工程學研究所 === 103 === Moore’s Law is the main driving force in the semiconductor industry, the number of transistors in the integrated circuit has doubled almost every two years. However, it is becoming more challenging for the semiconductor manufacturing technology to follow the trend as in the past. While the conventional MOSFETs face the scaling limits, 3D transistors such as FinFETs improve the transistor feature size and performance over planar MOSFETs to continue the scaling trend. However, the increasing device density, materials with poor thermal conductivity and the physical confinement of the device geometries are responsible for the increased the self-heating effects in ultra-scaled transistors. Instead of the reduction of the transistor size, 3D IC has also been demonstrated as a feasible technology. While traditional methods of interconnect such as wire bonding need long cross-chip interconnects, 3D ICs achieve shorter interconnect architectures by stacking one die on top of another dies. 3D packaging technology offer an alternative that not only improve the overall transmission speed and reduce the power consumption, but also increase the functionality of ICs at a smaller footprint. In this way, it extends the semiconductor scaling limits beyond the roadmap predicted by Moore''s. Law, and TSV is one of these key technologies as an effective solution. The content of the thesis can be divided into two major parts. First, we discuss about the effect of thermo-mechanical stress induced by TSV structures. We simulated the thermo-mechanical stresses near the surface of Si substrate and investigate its impacts on the performance of the nearby electronic devices. With the experimental results and numerical calibrations, we present a keep out zone model. Second, the self-heating effects on advanced devices and the heat dissipation have been investigated. Self-heating effects can not only degrade device performance but also accelerate degradation mechanism, and all these problems may increase the difficulty in IC designing. Therefore, the thermal issue becomes very important and needs to be solved and we are trying to study the self-heating effects on advanced devices.
author2 Chee Wee Liu
author_facet Chee Wee Liu
Yi-Chung Huang
黃奕中
author Yi-Chung Huang
黃奕中
spellingShingle Yi-Chung Huang
黃奕中
Simulation of Through Silicon Via and Self-heating Effects on Advanced Devices
author_sort Yi-Chung Huang
title Simulation of Through Silicon Via and Self-heating Effects on Advanced Devices
title_short Simulation of Through Silicon Via and Self-heating Effects on Advanced Devices
title_full Simulation of Through Silicon Via and Self-heating Effects on Advanced Devices
title_fullStr Simulation of Through Silicon Via and Self-heating Effects on Advanced Devices
title_full_unstemmed Simulation of Through Silicon Via and Self-heating Effects on Advanced Devices
title_sort simulation of through silicon via and self-heating effects on advanced devices
publishDate 2015
url http://ndltd.ncl.edu.tw/handle/97006676992965109035
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