| Summary: | 碩士 === 國立臺灣大學 === 電子工程學研究所 === 103 === By the evolution of technology, digital data communication systems have become essential to our daily life. This dissertation proposes a low-power and low-cost On-Off Keying(OOK) transceiver for powerline communication (PLC) system and a receiver for HomePlug AV powerline communication system standard. The OOK modulation not only saves the power consumption but also saves the area cost. The HomePlug AV receiver includes a PGA and a pipelined ADC.
The OOK PLC transceiver was fabricated in TSMC 0.25um CMOS technology. With the 1.2 MHz carrier frequency, the transceiver achieves 45 Kbps data rate. When the transceiver operates at 10 Kbps data rate, the power consumption is 34mW. Moreover, the transceiver can recover the NRZ data by 1-meter and 5-meter powerline cable.
The receiver for HomePlug AV powerline communication was implemented in TSMC 90nm CMOS technology. When the receiver operate at 100MS/s sampling rate with 50MHz input frequency, the measured ENOB and SFDR is 6.85 and 49.98dB. In 120MS/s sampling rate with 60MHz input frequency, the measured ENOB is 6.55 and SFDR is 53.88dB respectively. The receiver consumes 73.2mW from 1.2-V supply when the sampling rate is 100MS/s.
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