Implementation and Analysis of KP SEPIC Converter

• Main Authors: Huan-You Lin, 林煥侑
• Other Authors: Jeng-Yue Chen
• Format: Others
• Language: zh-TW
• Published: 2015
• Online Access: http://ndltd.ncl.edu.tw/handle/h4m6bw

碩士 === 國立虎尾科技大學 === 電機工程研究所 === 103 === This thesis proposes an implementation and analysis of KP SEPIC converter which is originally proposed by professor Ching-Tsai Pan in National Tsing Hua University. And the KP SEPIC converter is named after his father Mr. Kung Pan(K.P.) for memorial. The converter topology is made from the concept of traditional SEPIC converter output inductor for adjusting energy and smoothing the input and output currents. In comparison with element amount of traditional SEPIC converter, the new one is merely with one more inductor and capacitor each. The most feature of this innovation converter is that the inductor input current is continuous and with nearly zero input ripple voltage in ideal. To improve traditional inductor having different voltage in different operation mode and also influence current cause enormous alteration, the thesis proposes open loop and close loop system to increase its stability and with experiment to prove it. From Bode plot made by network spectrum analyzer, we can conclude that in continuous conduction mode is with 100V input voltage, 66V or 122V output voltage, 180W rated power and the 90% about efficiency can be obtained when the load is 80W.