The Strategies of Layout for Preventing EMI on a High-Speed PCB

• Main Authors: Hsiao-Chuan Huang, 黃筱娟
• Other Authors: Dr. Jyh-Perng Fang
• Format: Others
• Language: zh-TW
• Published: 2014
• Online Access: http://ndltd.ncl.edu.tw/handle/h2c3bd

碩士 === 國立臺北科技大學 === 電資碩士在職專班研究所 === 103 === Various electronic products require higher-speed design. To avoid the problems raised in a high-speed circuit PCB, the layout should be concerned. The layout decides the quality of trace routing, size of circuit board, and the ability to avoid electromagnetic interference. A good PCB layout increases the signal integrity and timing synchronization. It also helps to decrease product development cost and raise the ability of preventing unpredictable interference as well as radiated noise. In this paper, we explain the strategies for achieving good EMI improvements through EMI-Stream simulation tool in a limited layout space. Also, we present the steps of utilizing advanced EMI simulation including Routing, Ground (Vias), and Stack-Up (Material Thickness) parameters at frequency span of 50MHz and 100MHz signals separately, and considering its harmonic energy effect. This method does help on reducing the man power and time cost for repeated modifications of PCB design while increasing design quality and enhancing the delivery schedule of products.