| Summary: | 碩士 === 國立雲林科技大學 === 電子工程系 === 103 === In the past few years, the wireless communication was rapidly growth. The electronic devices require high performance and protability. Meanwhile, the advanced process of integrated circuit had been developed to several nanometers, which is a great improvement on IC implementation. This article is aiming to develop the VCOs that can achieve IEEE 802.11a communication protical. The design of the VCO takes phase noise, power disspation, tuning range, output swing and output power into account. The simulation and implementation of the circuit were finished by using 0.18μm CMOS process, provided by Taiwan Semiconductor Manufacturing Company.
The first chip uses current reused structure as the core circuit. And the modified amplitude detector is adopted to provide the body biasing voltage. The measured performance is shown as follows:
Tuning Range: 4.867GHz~5.847GHz
Phase Noise: -116.145dBc/Hz @ V_tune=0V
Power Dissipation: 2.880mW @ V_tune=0V
Output Power: -2.62dBm @ V_tune=0V
By using the stacking transformer to the first chip, the second chip has a better performance. The properties of the transformer, like DC block and voltage mutiply, allow the circuit has a stable feedback and a complete output swing. The measured performance is shown as follows:
Tuning Range: 4.648GHz~6.045GHz
Phase Noise: -114.044dBc/Hz @ V_tune=0V
Power Dissipation: 7.335mW @ V_tune=0V
Output Power: -4.04dBm @ V_tune=0V
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